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/linux-5.10/drivers/soc/zte/
Dzx296718_pm_domains.c39 .polarity = PWREN,
48 .polarity = PWREN,
57 .polarity = PWREN,
66 .polarity = PWREN,
75 .polarity = PWREN,
84 .polarity = PWREN,
93 .polarity = PWREN,
102 .polarity = PWREN,
111 .polarity = PWREN,
120 .polarity = PWREN,
[all …]
/linux-5.10/include/media/i2c/
Dtvp7002.h20 *@clk_polarity: Clock polarity
23 *@hs_polarity: HSYNC polarity
25 *@vs_polarity: VSYNC Polarity
27 *@fid_polarity: Active-high Field ID polarity.
30 * 1 - Operation with polarity inverted.
31 *@sog_polarity: Active high Sync on Green output polarity.
32 * 0 - Normal operation, 1 - Operation with polarity inverted
/linux-5.10/drivers/pwm/
Dpwm-atmel-tcb.c34 enum pwm_polarity polarity; /* PWM polarity */ member
63 enum pwm_polarity polarity) in atmel_tcb_pwm_set_polarity() argument
67 tcbpwm->polarity = polarity; in atmel_tcb_pwm_set_polarity()
95 tcbpwm->polarity = PWM_POLARITY_NORMAL; in atmel_tcb_pwm_request()
150 enum pwm_polarity polarity = tcbpwm->polarity; in atmel_tcb_pwm_disable() local
158 * This is why we're reverting polarity in this case. in atmel_tcb_pwm_disable()
161 polarity = !polarity; in atmel_tcb_pwm_disable()
169 if (polarity == PWM_POLARITY_INVERSED) in atmel_tcb_pwm_disable()
175 if (polarity == PWM_POLARITY_INVERSED) in atmel_tcb_pwm_disable()
209 enum pwm_polarity polarity = tcbpwm->polarity; in atmel_tcb_pwm_enable() local
[all …]
Dcore.c155 pwm->args.polarity = PWM_POLARITY_NORMAL; in of_pwm_xlate_with_flags()
158 pwm->args.polarity = PWM_POLARITY_INVERSED; in of_pwm_xlate_with_flags()
265 * @polarity: initial polarity of PWM channels
268 * will be used. The initial polarity for all channels is specified by the
269 * @polarity parameter.
274 enum pwm_polarity polarity) in pwmchip_add_with_polarity() argument
306 pwm->state.polarity = polarity; in pwmchip_add_with_polarity()
336 * will be used. The initial polarity for all channels is normal.
491 * The lowlevel driver either ignored .polarity (which is a bug) or as in pwm_apply_state_debug()
492 * best effort inverted .polarity and fixed .duty_cycle respectively. in pwm_apply_state_debug()
[all …]
Dpwm-imx-tpm.c9 * - Changes to polarity cannot be latched at the time of the
129 real_state->polarity = state->polarity; in pwm_imx_tpm_round_state()
154 /* get polarity */ in pwm_imx_tpm_get_state()
157 state->polarity = PWM_POLARITY_INVERSED; in pwm_imx_tpm_get_state()
161 * normal polarity. in pwm_imx_tpm_get_state()
163 state->polarity = PWM_POLARITY_NORMAL; in pwm_imx_tpm_get_state()
218 /* polarity is NOT allowed to be changed if PWM is active */ in pwm_imx_tpm_apply_hw()
219 if (c.enabled && c.polarity != state->polarity) in pwm_imx_tpm_apply_hw()
249 * polarity settings will enabled/disable output status in pwm_imx_tpm_apply_hw()
259 * set polarity (for edge-aligned PWM modes) in pwm_imx_tpm_apply_hw()
[all …]
Dpwm-omap-dmtimer.c29 * - PWM OMAP DM timer cannot change the polarity when pwm is active. When
30 * user requests a change in polarity when in active state:
32 * - Polarity is changed
127 * pwm_omap_dmtimer_polarity() - Detect the polarity of pwm.
130 * Return the polarity of pwm.
241 * pwm_omap_dmtimer_set_polarity() - Changes the polarity of the pwm dm timer.
244 * @polarity: New pwm polarity to be set
248 enum pwm_polarity polarity) in pwm_omap_dmtimer_set_polarity() argument
253 /* Disable the PWM before changing the polarity. */ in pwm_omap_dmtimer_set_polarity()
259 polarity == PWM_POLARITY_INVERSED, in pwm_omap_dmtimer_set_polarity()
[all …]
Dsysfs.c159 const char *polarity = "unknown"; in polarity_show() local
164 switch (state.polarity) { in polarity_show()
166 polarity = "normal"; in polarity_show()
170 polarity = "inversed"; in polarity_show()
174 return sprintf(buf, "%s\n", polarity); in polarity_show()
183 enum pwm_polarity polarity; in polarity_store() local
188 polarity = PWM_POLARITY_NORMAL; in polarity_store()
190 polarity = PWM_POLARITY_INVERSED; in polarity_store()
196 state.polarity = polarity; in polarity_store()
221 static DEVICE_ATTR_RW(polarity);
/linux-5.10/Documentation/fb/
Dviafb.modes25 # Polarity negative negative
50 # Polarity negative negative
71 # Polarity negative negative
92 # Polarity positive positive
113 # Polarity positive positive
134 # Polarity positive positive
155 # Polarity positive positive
176 # Polarity positive positive
197 # Polarity positive positive
219 # Polarity positive positive
[all …]
/linux-5.10/include/linux/
Dpwm.h15 * enum pwm_polarity - polarity of a PWM signal
31 * @polarity: reference polarity
43 enum pwm_polarity polarity; member
55 * @polarity: PWM polarity
61 enum pwm_polarity polarity; member
146 return state.polarity; in pwm_get_polarity()
163 * and polarity fields with the reference values defined in pwm->args.
184 state->polarity = args.polarity; in pwm_init_state()
254 * @set_polarity: configure the polarity of this PWM
273 enum pwm_polarity polarity);
[all …]
/linux-5.10/drivers/media/platform/omap3isp/
Domap3isp.h31 * @clk_pol: Pixel clock polarity
33 * @hs_pol: Horizontal synchronization polarity
35 * @vs_pol: Vertical synchronization polarity
37 * @fld_pol: Field signal polarity
39 * @data_pol: Data polarity
64 * struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity
66 * @pol: polarity of the lane
88 * @strobe_clk_pol: Strobe/clock polarity
/linux-5.10/drivers/acpi/
Dirq.c46 * @polarity: polarity of the GSI to be mapped
52 int polarity) in acpi_register_gsi() argument
63 fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity); in acpi_register_gsi()
136 * @polarity: polarity attributes of hwirq
137 * @polarity: polarity attributes of hwirq
147 u8 polarity, u8 shareable, in acpi_irq_parse_one_match() argument
153 *ctx->res_flags = acpi_dev_irq_flags(triggering, polarity, shareable); in acpi_irq_parse_one_match()
156 ctx->fwspec->param[1] = acpi_dev_get_irq_type(triggering, polarity); in acpi_irq_parse_one_match()
195 irq->triggering, irq->polarity, in acpi_irq_parse_one_cb()
208 eirq->triggering, eirq->polarity, in acpi_irq_parse_one_cb()
/linux-5.10/drivers/net/wireless/ath/ath5k/
Drfkill.c41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n", in ath5k_rfkill_disable()
42 ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_disable()
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity); in ath5k_rfkill_disable()
50 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n", in ath5k_rfkill_enable()
51 ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_enable()
53 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_enable()
72 ah->rf_kill.polarity; in ath5k_is_rfkill_set()
91 ah->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol; in ath5k_rfkill_hw_start()
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmicrochip,pic32-evic.txt9 External interrupts have a software configurable edge polarity. Non external
10 interrupts have a type and polarity that is determined by the source of the
26 irq_type - is used to describe the type and polarity of an interrupt. For
29 IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
34 polarity configuration. This array corresponds to the bits in the INTCON
49 and polarity.
/linux-5.10/include/trace/events/
Dpwm.h21 __field(enum pwm_polarity, polarity)
29 __entry->polarity = state->polarity;
33 TP_printk("%p: period=%llu duty_cycle=%llu polarity=%d enabled=%d",
35 __entry->polarity, __entry->enabled)
/linux-5.10/drivers/media/dvb-frontends/
Dm88ds3103.h52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
56 * @agc_inv: AGC polarity.
59 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
61 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
97 * @ts_clk_pol: TS clk polarity.Default: 0.
100 * @agc_inv: AGC polarity. Default: 0.
105 * @lnb_hv_pol: LNB H/V pin polarity. Default: 0. Values:
108 * @lnb_en_pol: LNB enable pin polarity. Default: 0. Values:
/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dtvp7002.txt10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
24 - field-even-active: Active-high Field ID output polarity control of the bus.
28 1 = FID output polarity inverted
/linux-5.10/drivers/counter/
Dstm32-lptimer-cnt.c27 u32 polarity; member
100 /* Setup LP timer encoder/counter and polarity, without prescaler */ in stm32_lptim_setup()
105 val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0); in stm32_lptim_setup()
172 if (priv->polarity > 1) in stm32_lptim_read_raw()
232 return priv->polarity; in stm32_lptim_cnt_get_polarity()
244 priv->polarity = type; in stm32_lptim_cnt_set_polarity()
308 IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
309 IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
334 IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
335 IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
[all …]
/linux-5.10/Documentation/devicetree/bindings/regulator/
Drichtek,rtmv20-regulator.yaml100 richtek,strobe-polarity-high:
101 description: Strobe pin active polarity control.
104 richtek,vsync-polarity-high:
105 description: Vsync pin active polarity control.
149 richtek,strobe-polarity-high;
150 richtek,vsync-polarity-high;
/linux-5.10/Documentation/driver-api/
Dpwm.rst64 period). struct pwm_args contains 2 fields (period and polarity) and should
105 polarity
106 Changes the polarity of the PWM signal (read/write).
108 the polarity. The polarity can only be changed if the PWM is not
132 When implementing polarity support in a PWM driver, make sure to respect the
133 signal conventions in the PWM framework. By definition, normal polarity
136 polarity starts low for the duration of the duty cycle and goes high for the
/linux-5.10/include/media/davinci/
Ddm644x_ccdc.h133 /* field id polarity */
135 /* vertical sync polarity */
137 /* horizontal sync polarity */
157 /* field id polarity */
159 /* vertical sync polarity */
161 /* horizontal sync polarity */
/linux-5.10/drivers/irqchip/
Dirq-ftintc010.c85 u32 mode, polarity; in ft010_irq_set_type() local
88 polarity = readl(FT010_IRQ_POLARITY(f->base)); in ft010_irq_set_type()
93 polarity |= BIT(offset); in ft010_irq_set_type()
97 polarity &= ~BIT(offset); in ft010_irq_set_type()
101 polarity |= BIT(offset); in ft010_irq_set_type()
105 polarity &= ~BIT(offset); in ft010_irq_set_type()
113 writel(polarity, FT010_IRQ_POLARITY(f->base)); in ft010_irq_set_type()
Dirq-davinci-cp-intc.c76 unsigned int reg, mask, polarity, type; in davinci_cp_intc_set_irq_type() local
80 polarity = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_POLARITY(reg)); in davinci_cp_intc_set_irq_type()
85 polarity |= mask; in davinci_cp_intc_set_irq_type()
89 polarity &= ~mask; in davinci_cp_intc_set_irq_type()
93 polarity |= mask; in davinci_cp_intc_set_irq_type()
97 polarity &= ~mask; in davinci_cp_intc_set_irq_type()
104 davinci_cp_intc_write(polarity, DAVINCI_CP_INTC_SYS_POLARITY(reg)); in davinci_cp_intc_set_irq_type()
/linux-5.10/arch/ia64/kernel/
Diosapic.c57 * IOSAPIC pin (if they're level triggered and use the same polarity).
143 unsigned char polarity: 1; /* interrupt polarity member
231 pol = iosapic_intr_info[irq].polarity; in set_rte()
497 if (info->trigger == trigger && info->polarity == pol && in iosapic_find_sharable_irq()
553 unsigned long polarity, unsigned long trigger) in register_intr() argument
585 (info->trigger != trigger || info->polarity != polarity)){ in register_intr()
596 iosapic_intr_info[irq].polarity = polarity; in register_intr()
713 unsigned long polarity, unsigned long trigger) in iosapic_register_intr() argument
744 irq = iosapic_find_sharable_irq(trigger, polarity); in iosapic_register_intr()
753 err = register_intr(gsi, irq, dmode, polarity, trigger); in iosapic_register_intr()
[all …]
/linux-5.10/Documentation/devicetree/bindings/gpio/
Dgpio.txt86 A gpio-specifier should contain a flag indicating the GPIO polarity; active-
90 The gpio-specifier's polarity flag should represent the physical level at the
97 When the device's signal polarity is configurable, the binding for the
100 a) Define a single static polarity for the signal, with the expectation that
102 that signal polarity.
104 The static choice of polarity may be either:
112 In particular, the polarity cannot be derived from the gpio-specifier, since
114 concepts of configurable signal polarity in the device, and possible board-
119 b) Pick a single option for device signal polarity, and document this choice
120 in the binding. The gpio-specifier should represent the polarity of the signal
[all …]
/linux-5.10/drivers/pnp/pnpacpi/
Drsparser.c19 u8 *polarity, u8 *shareable) in decode_irq_flags() argument
25 *polarity = ACPI_ACTIVE_LOW; in decode_irq_flags()
29 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
33 *polarity = ACPI_ACTIVE_LOW; in decode_irq_flags()
37 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
43 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
208 gpio->polarity, in pnpacpi_allocated_resource()
318 flags = acpi_dev_irq_flags(p->triggering, p->polarity, p->shareable); in pnpacpi_parse_irq_option()
342 flags = acpi_dev_irq_flags(p->triggering, p->polarity, p->shareable); in pnpacpi_parse_ext_irq_option()
663 u8 triggering, polarity, shareable; in pnpacpi_encode_irq() local
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