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Searched full:pma0 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/phy/
H A Dphy-airoha-pcie.c35 * @pma0: IO mapped register base address of PMA0-PCIe
45 void __iomem *pma0; member
90 airoha_phy_clear_bits((pcie_phy)->pma0 + (reg), (mask))
94 airoha_phy_set_bits((pcie_phy)->pma0 + (reg), (mask))
98 airoha_phy_update_field((pcie_phy)->pma0 + (reg), (mask), (val))
179 readl(pcie_phy->pma0 + in airoha_phy_init_lane0_rx_fw_pre_calib()
200 readl(pcie_phy->pma0 + in airoha_phy_init_lane0_rx_fw_pre_calib()
225 val = readl(pcie_phy->pma0 + REG_PCIE_PMA_RO_RX_FREQDET); in airoha_phy_init_lane0_rx_fw_pre_calib()
427 writel(0xcccbcccb, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_21); in airoha_pcie_phy_init_default()
428 writel(0xcccb, pcie_phy->pma0 + REG_PCIE_PMA_DIG_RESERVE_22); in airoha_pcie_phy_init_default()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dairoha,en7581-pcie-phy.yaml31 - const: pma0
65 reg-names = "csr-2l", "pma0", "pma1",
/linux/drivers/reset/
H A Dreset-eyeq.c29 * 4. PMA0 5. PMA1 6. PMAC0 7. PMAC1
48 * 4. PMA0 5. PMA1 6. PMAC0 7. PMAC1
61 * 9. PMA0 10. PMA1 11. MPC0 12. MPC1
/linux/arch/arm64/boot/dts/airoha/
H A Den7581.dtsi196 reg-names = "csr-2l", "pma0", "pma1",
/linux/arch/powerpc/kvm/
H A Dbook3s_hv_rmhandlers.S2893 * unavoidably writes MMCR0[PMA0] as well. On POWER8,