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Searched full:pipe0 (Results 1 – 25 of 27) sorted by relevance

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/linux-5.10/drivers/most/
Dcore.c57 struct pipe pipe0; member
473 if (c->pipe0.comp) { in print_links()
477 c->pipe0.comp->name, in print_links()
559 if (!c->pipe0.comp) in link_channel_to_component()
560 comp_ptr = &c->pipe0.comp; in link_channel_to_component()
703 if (c->pipe0.comp == comp) in most_remove_link()
704 c->pipe0.comp = NULL; in most_remove_link()
852 if (c->pipe0.refs && c->pipe0.comp->tx_completion) in arm_mbo()
853 c->pipe0.comp->tx_completion(c->iface, c->channel_id); in arm_mbo()
963 if (c->pipe0.refs && c->pipe1.refs && in channel_has_mbo()
[all …]
/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qmp-usb3-dp-phy.yaml102 - const: pipe0
199 clock-names = "pipe0";
Dqcom,qmp-phy.yaml315 clock-names = "pipe0";
/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubbub.c153 * 0: Pipe0 Plane0 Allow Pstate Change in hubbub1_verify_allow_pstate_change_high()
154 * 1: Pipe0 Plane1 Allow Pstate Change in hubbub1_verify_allow_pstate_change_high()
155 * 2: Pipe0 Cursor0 Allow Pstate Change in hubbub1_verify_allow_pstate_change_high()
156 * 3: Pipe0 Cursor1 Allow Pstate Change in hubbub1_verify_allow_pstate_change_high()
Ddcn10_hw_sequencer.c786 /* by upper caller loop, pipe0 is parent pipe and be called first. in dcn10_enable_stream_timing()
787 * back end is set up by for pipe0. Other children pipe share back end in dcn10_enable_stream_timing()
911 /* by upper caller loop, parent pipe: pipe0, will be reset last. in dcn10_reset_back_end_for_pipe()
/linux-5.10/include/linux/usb/
Dr8a66597.h263 #define BRDY0 0x0001 /* b1: PIPE0 */
275 #define NRDY0 0x0001 /* b1: PIPE0 */
287 #define BEMP0 0x0001 /* b0: PIPE0 */
/linux-5.10/drivers/usb/gadget/udc/
Dm66592-udc.h164 #define M66592_BRDY0 0x0001 /* b1: PIPE0 */
175 #define M66592_NRDY0 0x0001 /* b1: PIPE0 */
186 #define M66592_BEMP0 0x0001 /* b0: PIPE0 */
Dm66592-udc.c756 pr_err("pipe0 is busy. maybe cpu i/o bus " in irq_ep0_write()
Dr8a66597-udc.c953 "pipe0 is busy. maybe cpu i/o bus " in irq_ep0_write()
/linux-5.10/drivers/gpu/drm/gma500/
Dmdfld_dsi_output.c449 gpiod = gpiod_get(dev, "dsi-pipe0-reset", GPIOD_OUT_HIGH); in mdfld_dsi_panel_reset()
465 gpiod = gpiod_get(dev, "dsi-pipe0-reset", GPIOD_ASIS); in mdfld_dsi_panel_reset()
Dmdfld_device.c515 GPIO_LOOKUP("0000:00:0c.0", 128, "dsi-pipe0-reset",
/linux-5.10/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h420 #define DCN_1_0__SRCID__DCPG_DCFE0_POWER_UP_INT 0x14 // Display pipe0 power up interrupt D…
444 #define DCN_1_0__SRCID__DCPG_DCFE0_POWER_DOWN_INT 0x14 // Display pipe0 power down interrupt D…
1060 #define DCN_1_0__SRCID__DCPG_DCFE8_POWER_UP_INT 0x4E // Display pipe0 power up interrupt DCPG_IHC_…
1084 #define DCN_1_0__SRCID__DCPG_DCFE8_POWER_DOWN_INT 0x4E // Display pipe0 power down interrupt DCPG_…
/linux-5.10/arch/arm64/boot/dts/qcom/
Dipq8074.dtsi110 clock-names = "pipe0";
153 clock-names = "pipe0";
Dmsm8998.dtsi988 clock-names = "pipe0";
1720 clock-names = "pipe0";
Dmsm8996.dtsi374 clock-names = "pipe0";
1808 clock-names = "pipe0";
Dsdm845.dtsi1901 clock-names = "pipe0";
2009 clock-names = "pipe0";
3509 clock-names = "pipe0";
3540 clock-names = "pipe0";
Dsm8150.dtsi869 clock-names = "pipe0";
/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr.c131 * for dppclk for pipe0 need dppclk = dispclk in ramp_up_dispclk_with_dpp()
/linux-5.10/drivers/staging/media/atomisp/pci/
Datomisp_ioctl.c1580 static struct atomisp_video_pipe *pipe0; in __wdt_on_master_slave_sensor_pipe() local
1583 if (atomisp_buffers_queued_pipe(pipe0)) in __wdt_on_master_slave_sensor_pipe()
1584 atomisp_wdt_refresh_pipe(pipe0, wdt_duration); in __wdt_on_master_slave_sensor_pipe()
1588 pipe0 = pipe; in __wdt_on_master_slave_sensor_pipe()
/linux-5.10/drivers/usb/renesas_usbhs/
Dcommon.c34 * | pipe0 |------>| fifo pio |
Dmod_host.c41 * | +--------------> | pipe0 (dcp) |
/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c661 /* by upper caller loop, pipe0 is parent pipe and be called first. in dcn20_enable_stream_timing()
662 * back end is set up by for pipe0. Other children pipe share back end in dcn20_enable_stream_timing()
2157 /* by upper caller loop, parent pipe: pipe0, will be reset last. in dcn20_reset_back_end_for_pipe()
/linux-5.10/tools/perf/pmu-events/arch/powerpc/power8/
Dother.json1991 "BriefDescription": "Larx finished in LSU pipe0",
3257 "BriefDescription": "Double Precision scalar instruction issued on Pipe0",
3281 "BriefDescription": "FPU store (SP or DP) issued on Pipe0",
3287 "BriefDescription": "Double Precision vector instruction issued on Pipe0",
/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dmes_v10_1.c434 /* unhalt MES and activate pipe0 */ in mes_v10_1_enable()
/linux-5.10/arch/powerpc/xmon/
Dspu-insns.h97 pipe0 execution pipelines:

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