Searched +full:phy +full:- +full:input +full:- +full:delay +full:- +full:mmc +full:- +full:highspeed (Results 1 – 25 of 47) sorted by relevance
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/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 11 - Piotr Sroka <piotrs@cadence.com> 14 - $ref: mmc-controller.yaml 19 - enum: 20 - socionext,uniphier-sd4hc 21 - const: cdns,sd4hc [all …]
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/linux-5.10/drivers/mmc/host/ |
D | sdhci-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/mmc/host.h> 12 #include <linux/mmc/mmc.h> 16 #include "sdhci-pltfm.h" 18 /* HRS - Host Register Set (specific to Cadence) */ 19 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */ 38 /* SRS - Slot Register Set (SDHCI-compatible) */ 41 /* PHY */ 56 * The tuned val register is 6 bit-wide, but not the whole of the range is 57 * available. The range 0-42 seems to be available (then 43 wraps around to 0) [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | rk3288-miqi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 15 stdout-path = "serial2:115200n8"; 23 ext_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <125000000>; 27 clock-output-names = "ext_gmac"; 31 compatible = "gpio-leds"; [all …]
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D | rk3288-evb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/pwm/pwm.h> 13 adc-keys { 14 compatible = "adc-keys"; 15 io-channels = <&saradc 1>; 16 io-channel-names = "buttons"; 17 keyup-threshold-microvolt = <1800000>; 19 button-up { 22 press-threshold-microvolt = <100000>; [all …]
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D | rk3288-tinker.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/rockchip,rk808.h> 12 stdout-path = "serial2:115200n8"; 20 ext_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <125000000>; 24 clock-output-names = "ext_gmac"; 27 gpio-keys { [all …]
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D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 24 vcc_flash: flash-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_flash"; [all …]
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D | rk3288-popmetal.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com> 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "PopMetal-RK3288"; 12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; 22 clock-output-names = "ext_gmac"; [all …]
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D | rk3288-firefly.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/input/input.h> 15 adc-keys { 16 compatible = "adc-keys"; 17 io-channels = <&saradc 1>; 18 io-channel-names = "buttons"; 19 keyup-threshold-microvolt = <1800000>; 21 button-recovery { 24 press-threshold-microvolt = <0>; 28 dovdd_1v8: dovdd-1v8-regulator { [all …]
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D | rk3066a-rayeager.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; 19 ir: ir-receiver { 20 compatible = "gpio-ir-receiver"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&ir_int>; 26 keys: gpio-keys { 27 compatible = "gpio-keys"; [all …]
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D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; [all …]
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/linux-5.10/arch/arm64/boot/dts/rockchip/ |
D | rk3368-orion-r68-meta.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368"; 15 stdout-path = "serial2:115200n8"; 23 emmc_pwrseq: emmc-pwrseq { 24 compatible = "mmc-pwrseq-emmc"; 25 pinctrl-0 = <&emmc_reset>; 26 pinctrl-names = "default"; 27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; [all …]
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D | rk3368-r88.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 15 stdout-path = "serial2:115200n8"; 23 emmc_pwrseq: emmc-pwrseq { 24 compatible = "mmc-pwrseq-emmc"; 25 pinctrl-0 = <&emmc_reset>; 26 pinctrl-names = "default"; 27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 30 keys: gpio-keys { [all …]
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D | rk3399-leez-p710.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 10 #include "rk3399-opp.dtsi" 17 stdout-path = "serial2:1500000n8"; 20 clkin_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 clock-frequency = <125000000>; 23 clock-output-names = "clkin_gmac"; [all …]
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D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/pwm/pwm.h" 9 #include "dt-bindings/input/input.h" 11 #include "rk3399-opp.dtsi" 15 compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399"; 18 stdout-path = "serial2:1500000n8"; 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; 23 clock-frequency = <125000000>; [all …]
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D | px30-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 14 compatible = "rockchip,px30-evb", "rockchip,px30"; 17 stdout-path = "serial5:115200n8"; 20 adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 2>; [all …]
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D | rk3399-hugsun-x99.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /dts-v1/; 3 #include <dt-bindings/pwm/pwm.h> 4 #include <dt-bindings/input/input.h> 6 #include "rk3399-opp.dtsi" 13 stdout-path = "serial2:1500000n8"; 16 clkin_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 clock-frequency = <125000000>; 19 clock-output-names = "clkin_gmac"; [all …]
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D | rk3328-rock64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 14 stdout-path = "serial2:1500000n8"; 17 gmac_clkin: external-gmac-clock { 18 compatible = "fixed-clock"; 19 clock-frequency = <125000000>; 20 clock-output-names = "gmac_clkin"; 21 #clock-cells = <0>; 24 vcc_sd: sdmmc-regulator { 25 compatible = "regulator-fixed"; [all …]
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D | rk3399-rock-pi-4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/pwm/pwm.h> 11 #include "rk3399-opp.dtsi" 15 stdout-path = "serial2:1500000n8"; 18 clkin_gmac: external-gmac-clock { 19 compatible = "fixed-clock"; 20 clock-frequency = <125000000>; 21 clock-output-names = "clkin_gmac"; [all …]
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D | rk3399-nanopi4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * RK3399-based FriendlyElec boards device tree source 14 /dts-v1/; 15 #include <dt-bindings/input/linux-event-codes.h> 17 #include "rk3399-opp.dtsi" 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "clkin_gmac"; [all …]
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D | rk3399-sapphire.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "dt-bindings/pwm/pwm.h" 7 #include "dt-bindings/input/input.h" 9 #include "rk3399-opp.dtsi" 12 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; 15 stdout-path = "serial2:1500000n8"; 18 clkin_gmac: external-gmac-clock { 19 compatible = "fixed-clock"; 20 clock-frequency = <125000000>; 21 clock-output-names = "clkin_gmac"; [all …]
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/linux-5.10/arch/arm64/boot/dts/amlogic/ |
D | meson-g12b-w400.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b.dtsi" 11 #include "meson-g12b-s922x.dtsi" 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/gpio/meson-g12a-gpio.h> 22 stdout-path = "serial0:115200n8"; 30 emmc_pwrseq: emmc-pwrseq { 31 compatible = "mmc-pwrseq-emmc"; 32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; [all …]
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D | meson-khadas-vim3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/gpio/meson-g12a-gpio.h> 10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 19 stdout-path = "serial0:115200n8"; 27 adc-keys { 28 compatible = "adc-keys"; 29 io-channels = <&saradc 2>; 30 io-channel-names = "buttons"; 31 keyup-threshold-microvolt = <1710000>; [all …]
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D | meson-gxm-khadas-vim2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 12 #include "meson-gxm.dtsi" 15 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; 24 stdout-path = "serial0:115200n8"; 32 adc-keys { 33 compatible = "adc-keys"; 34 io-channels = <&saradc 0>; 35 io-channel-names = "buttons"; [all …]
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D | meson-gx-libretech-pc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */ 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/sound/meson-aiu.h> 14 adc-keys { 15 compatible = "adc-keys"; 16 io-channels = <&saradc 0>; 17 io-channel-names = "buttons"; 18 keyup-threshold-microvolt = <1800000>; [all …]
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/linux-5.10/arch/arm64/boot/dts/socionext/ |
D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs3"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <0>; [all …]
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