| /linux-6.8/include/linux/ |
| D | peci.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018-2021 Intel Corporation */
13 * Currently we don't support any PECI command over 32 bytes.
21 * struct peci_controller_ops - PECI controller specific methods
22 * @xfer: PECI transfer function
24 * PECI controllers may have different hardware interfaces - the drivers
25 * implementing PECI controllers can use this structure to abstract away those
26 * differences by exposing a common interface for PECI core.
29 int (*xfer)(struct peci_controller *controller, u8 addr, struct peci_request *req);
33 * struct peci_controller - PECI controller
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| /linux-6.8/Documentation/devicetree/bindings/peci/ |
| D | peci-aspeed.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed PECI Bus
10 - Iwona Winiarska <iwona.winiarska@intel.com>
11 - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
14 - $ref: peci-controller.yaml#
19 - aspeed,ast2400-peci
20 - aspeed,ast2500-peci
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| D | nuvoton,npcm-peci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/nuvoton,npcm-peci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton PECI Bus
10 - Tomer Maimon <tmaimon77@gmail.com>
13 - $ref: peci-controller.yaml#
18 - nuvoton,npcm750-peci
19 - nuvoton,npcm845-peci
29 Clock source for PECI controller. Should reference the APB clock.
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| D | peci-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/peci-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic for PECI
10 - Iwona Winiarska <iwona.winiarska@intel.com>
13 PECI (Platform Environment Control Interface) is an interface that provides a
19 pattern: "^peci-controller(@.*)?$"
21 cmd-timeout-ms:
28 - |
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| /linux-6.8/Documentation/peci/ |
| D | peci.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
7 The Platform Environment Control Interface (PECI) is a communication
9 (e.g. Baseboard Management Controller, BMC).
10 PECI provides services that allow the management controller to
13 controller is acting as a PECI originator and the processor - as
14 a PECI responder.
15 PECI can be used in both single processor and multiple-processor based
19 Intel PECI specification is not released as a dedicated document,
24 PECI Wire
25 ---------
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| /linux-6.8/drivers/peci/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2021 Intel Corporation
10 #include <linux/peci.h>
21 struct peci_controller *controller = to_peci_controller(dev); in peci_controller_dev_release() local
23 mutex_destroy(&controller->bus_lock); in peci_controller_dev_release()
24 ida_free(&peci_controller_ida, controller->id); in peci_controller_dev_release()
25 kfree(controller); in peci_controller_dev_release()
32 int peci_controller_scan_devices(struct peci_controller *controller) in peci_controller_scan_devices() argument
38 ret = peci_device_create(controller, addr); in peci_controller_scan_devices()
49 struct peci_controller *controller; in peci_controller_alloc() local
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 menuconfig PECI config
4 tristate "PECI support"
6 The Platform Environment Control Interface (PECI) is an interface
10 If you are building a Baseboard Management Controller (BMC) kernel
15 will be called peci.
17 if PECI
20 tristate "PECI CPU"
23 This option enables peci-cpu driver for Intel processors. It is
32 will be called peci-cpu.
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| D | device.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2021 Intel Corporation
5 #include <linux/peci.h>
6 #include <linux/peci-cpu.h>
12 * PECI device can be removed using sysfs, but the removal can also happen as
13 * a result of controller being removed.
14 * Mutex is used to protect PECI device from being double-deleted.
29 * PECI device may be in a state where it is unable to return a proper in peci_get_revision()
37 return -EIO; in peci_get_revision()
103 device->info.family = peci_x86_cpu_family(cpu_id); in peci_device_info_init()
[all …]
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| D | request.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/peci.h>
90 return req->rx.buf[0]; in peci_request_data_cc()
94 * peci_request_status() - return -errno based on PECI completion code
95 * @req: the PECI request that contains response data with completion code
97 * It can't be used for Ping(), GetDIB() and GetTemp() - for those commands we
100 * Return: -errno
107 dev_dbg(&req->device->dev, "ret: %#02x\n", cc); in peci_request_status()
115 return -EAGAIN; in peci_request_status()
117 return -EINVAL; in peci_request_status()
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| D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/peci.h>
7 #include <linux/peci-cpu.h>
13 * peci_temp_read() - read the maximum die temperature from PECI target device
14 * @device: PECI device to which request is going to be sent
17 * It uses GetTemp PECI command.
38 * peci_pcs_read() - read PCS register
39 * @device: PECI device to which request is going to be sent
44 * It uses RdPkgConfig PECI command.
70 * peci_pci_local_read() - read 32-bit memory location using raw address
[all …]
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| D | internal.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018-2021 Intel Corporation */
15 /* PECI CPU address range 0x30-0x37 */
67 * struct peci_device_id - PECI device data to match
81 int peci_device_create(struct peci_controller *controller, u8 addr);
88 * struct peci_driver - PECI driver
92 * @id_table: PECI device match table to decide which device to bind
109 * peci_driver_register() - register PECI driver
112 * PECI drivers that don't need to do anything special in module init should
122 * module_peci_driver() - helper macro for registering a modular PECI driver
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only
4 peci-y := core.o request.o device.o sysfs.o
5 obj-$(CONFIG_PECI) += peci.o
6 peci-cpu-y := cpu.o
7 obj-$(CONFIG_PECI_CPU) += peci-cpu.o
10 obj-y += controller/
|
| /linux-6.8/drivers/peci/controller/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 tristate "ASPEED PECI support"
10 This option enables PECI controller driver for ASPEED AST2400,
12 connected to it, and communicate with them using PECI protocol.
18 be called peci-aspeed.
21 tristate "Nuvoton NPCM PECI support"
26 This option enables PECI controller driver for Nuvoton NPCM7XX
28 to it and communicate with them using PECI protocol.
31 Interface (PECI) bus adapter driver on the Nuvoton NPCM SoCs.
34 will be called peci-npcm.
|
| D | peci-npcm.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/peci.h>
19 /* NPCM PECI Registers */
31 /* NPCM_PECI_CTL_STS - 0x00 : Control Register */
38 /* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */
41 /* NPCM_PECI_CMD - 0x10 : Command Register */
44 /* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */
47 /* NPCM_PECI_PDDR - 0x2C : Command Register */
67 struct peci_controller *controller; member
73 static int npcm_peci_xfer(struct peci_controller *controller, u8 addr, struct peci_request *req) in npcm_peci_xfer() argument
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| D | peci-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2012-2017 ASPEED Technology Inc.
3 // Copyright (c) 2018-2021 Intel Corporation
10 #include <linux/clk-provider.h>
19 #include <linux/peci.h>
23 /* ASPEED PECI Registers */
124 struct peci_controller *controller; member
144 u32 val = readl(priv->base + ASPEED_PECI_CTRL); in aspeed_peci_controller_enable()
149 writel(val, priv->base + ASPEED_PECI_CTRL); in aspeed_peci_controller_enable()
157 writel(ASPEED_PECI_INT_MASK, priv->base + ASPEED_PECI_INT_STS); in aspeed_peci_init_regs()
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| /linux-6.8/arch/arm64/boot/dts/nuvoton/ |
| D | nuvoton-common-npcm8xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
16 compatible = "simple-bus";
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| /linux-6.8/Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
31 - enum:
33 - acbel,fsg032
34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
35 - ad,ad7414
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| /linux-6.8/arch/arm/boot/dts/nuvoton/ |
| D | nuvoton-common-npcm7xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
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| /linux-6.8/drivers/hwmon/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
76 with SMpro co-processor.
288 will be called as370-hwmon.
311 will be called axi-fan-control
320 lm-sensors 2.10.1 for proper userspace support.
355 Controller, which provides an accelerometer (Apple Sudden Motion
359 Only Intel-based Apple's computers are supported (MacBook Pro,
366 the laptop to act as a pinball machine-esque joystick.
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| D | it87.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
6 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
7 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
8 * addition to an Environment Controller (Enhanced Hardware Monitor and
9 * Fan Controller)
11 * This driver supports only the Environment Controller in the IT8705F and
41 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
53 #include <linux/hwmon-sysfs.h>
54 #include <linux/hwmon-vid.h>
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| /linux-6.8/arch/arm/boot/dts/aspeed/ |
| D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
51 compatible = "simple-bus";
52 #address-cells = <1>;
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| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
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| /linux-6.8/Documentation/hwmon/ |
| D | it87.rst | 174 - Christophe Gauthron
175 - Jean Delvare <jdelvare@suse.de>
179 -----------------
192 misconfigured by BIOS - PWM values would be inverted. This option tries
209 Provided since there are reports that system-wide acpi_enfore_resources=lax
217 -------------------
219 All the chips supported by this driver are LPC Super-I/O chips, accessed
220 through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an
228 -----------
237 include an 'environment controller' with 3 temperature sensors, 3 fan
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| /linux-6.8/tools/arch/x86/kcpuid/ |
| D | cpuid.csv | 22 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout
33 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported
36 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present
43 …1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline …
48 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported
52 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement
67 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension
103 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1
104 … 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads s…
112 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported
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