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/qemu/fpu/
H A Dsoftfloat-specialize.c.inc20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
23 Written by John R. Hauser. This work was made possible in part by the
27 of this code was written as part of a project to build a fixed-point vector
/qemu/block/
H A Dqcow2.h439 * Describes an in-flight (part of a) write request that writes to clusters
465 * writes to. This (part of the) write request starts at
472 * writes to. This (part of the) write request ends at cow_end.offset
H A Dpreallocate.c443 * update s->data_end, to move part of "filter preallocation" in preallocate_co_truncate()
445 * Otherwise just proceed to preallocate missing part. in preallocate_co_truncate()
/qemu/target/riscv/
H A Ddebug.c445 /* validate the generic part first */ in type2_mcontrol_validate()
573 /* validate the generic part first */ in type6_mcontrol6_validate()
803 /* validate the generic part first */ in itrigger_validate()
/qemu/include/user/
H A Dsafe-syscall.h128 /* The core part of this function is implemented in assembly */
/qemu/docs/devel/
H A Dcontrol-flow-integrity.rst101 * TCG is not considered a security-sensitive part of QEMU so this does not
/qemu/docs/system/i386/
H A Dtdx.rst38 under full control of VMM. VMM can only configure part of features of a TD on
/qemu/target/hexagon/
H A Dgen_printinsn.py94 # Append the remaining part of the string.
/qemu/docs/system/
H A Dsecrets.rst65 this newline is not intended to be part of the secret data.
/qemu/ui/
H A Dvnc-enc-zywrle-template.c4 * THIS FILE IS PART OF THE 'ZYWRLE' VNC CODEC SOURCE CODE. *
/qemu/hw/pci-host/
H A Dsabre.c469 * PCI-facing part of the host bridge, not usable without the in sabre_pci_class_init()
470 * host-facing part, which can't be device_add'ed, yet. in sabre_pci_class_init()
/qemu/tests/unit/
H A Dtest-crypto-tlssession.c128 /* Now the real part of the test, setup the sessions */ in test_crypto_tls_session_psk()
319 /* Now the real part of the test, setup the sessions */ in test_crypto_tls_session_x509()
/qemu/target/ppc/
H A Dgdbstub.c380 /* Handle those SPRs that are not part of the env->spr[] array */ in gdb_get_spr_reg()
424 /* Handle those SPRs that are not part of the env->spr[] array */ in gdb_set_spr_reg()
/qemu/hw/audio/
H A Dvia-ac97.c481 /* Reason: Part of a south bridge chip */ in via_ac97_class_init()
516 /* Reason: Part of a south bridge chip */ in via_mc97_class_init()
/qemu/linux-headers/linux/
H A Diommufd.h25 * non-zero in a part the kernel does not understand.
393 * Any domain attached to the non-PASID part of the
397 * not recommended for both the non-PASID part
398 * and PASID part of the device.
/qemu/pc-bios/
H A Dedk2-licenses.txt200 An extra message for the patch email which will not be considered part
351 any part of Your Contributions.
435 An extra message for the patch email which will not be considered part
572 any part of Your Contributions.
/qemu/docs/devel/testing/
H A Dci-jobs.rst.inc112 submitting code. They are not required as part of the gating
/qemu/tests/vm/
H A Dnetbsd113 self.console_wait_send("b: Use default part", "b\n")
/qemu/hw/misc/
H A Dnpcm_clk.c1111 /* Reason: Part of NPCMCLKState component */ in npcm7xx_clk_pll_class_init()
1121 /* Reason: Part of NPCMCLKState component */ in npcm7xx_clk_sel_class_init()
1131 /* Reason: Part of NPCMCLKState component */ in npcm7xx_clk_divider_class_init()
H A Dimx25_ccm.c10 * To get the timer frequencies right, we need to emulate at least part of
/qemu/hw/isa/
H A Dvt82c686.c236 /* Reason: part of VIA south bridge, does not exist stand alone */ in via_pm_class_init()
850 /* Reason: part of VIA VT82C686 southbridge, needs to be wired up */ in vt82c686b_class_init()
915 /* Reason: part of VIA VT8231 southbridge, needs to be wired up */ in vt8231_class_init()
/qemu/target/arm/tcg/
H A Dneon-dp.decode48 # For FP insns the high bit of 'size' is used as part of opcode decode,
215 # Narrowing right shifts: here the Q bit is part of the opcode decode
226 # Long left shifts: again Q is part of opcode decode
388 # grouping ([23,4]=0b10), bits [21:20] are either part of the opcode
587 # For the 'long' ops the Q bit is part of insn decode
/qemu/docs/devel/migration/
H A Dmapped-ram.rst141 RAM. Other types of memory such as VRAM are migrated as part of device
/qemu/scripts/
H A Dclean-includes42 # However some caution is required regarding files that might be part
/qemu/linux-user/alpha/
H A Dtermbits.h91 #define TARGET_XTABS 01000000 /* Hmm.. Linux/i386 considers this part of TABDLY.. */

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