| /linux-5.10/drivers/clk/at91/ |
| D | sckc.c | 70 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_prepare() local
71 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_prepare()
74 if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en)) in clk_slow_osc_prepare()
77 writel(tmp | osc->bits->cr_osc32en, sckcr); in clk_slow_osc_prepare()
80 udelay(osc->startup_usec); in clk_slow_osc_prepare()
82 usleep_range(osc->startup_usec, osc->startup_usec + 1); in clk_slow_osc_prepare()
89 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_unprepare() local
90 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_unprepare()
93 if (tmp & osc->bits->cr_osc32byp) in clk_slow_osc_unprepare()
96 writel(tmp & ~osc->bits->cr_osc32en, sckcr); in clk_slow_osc_unprepare()
[all …]
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| D | clk-main.c | 70 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_prepare() local
71 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare()
93 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_unprepare() local
94 struct regmap *regmap = osc->regmap; in clk_main_osc_unprepare()
110 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_is_prepared() local
111 struct regmap *regmap = osc->regmap; in clk_main_osc_is_prepared()
135 struct clk_main_osc *osc; in at91_clk_register_main_osc() local
143 osc = kzalloc(sizeof(*osc), GFP_KERNEL); in at91_clk_register_main_osc()
144 if (!osc) in at91_clk_register_main_osc()
153 osc->hw.init = &init; in at91_clk_register_main_osc()
[all …]
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| /linux-5.10/drivers/clk/versatile/ |
| D | clk-vexpress-osc.c | 23 #define to_vexpress_osc(osc) container_of(osc, struct vexpress_osc, hw) argument
28 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_recalc_rate() local
31 regmap_read(osc->reg, 0, &rate); in vexpress_osc_recalc_rate()
39 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_round_rate() local
41 if (osc->rate_min && rate < osc->rate_min) in vexpress_osc_round_rate()
42 rate = osc->rate_min; in vexpress_osc_round_rate()
44 if (osc->rate_max && rate > osc->rate_max) in vexpress_osc_round_rate()
45 rate = osc->rate_max; in vexpress_osc_round_rate()
53 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_set_rate() local
55 return regmap_write(osc->reg, 0, rate); in vexpress_osc_set_rate()
[all …]
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| /linux-5.10/drivers/clk/imx/ |
| D | clk-imx7d.c | 44 static const char *arm_a7_sel[] = { "osc", "pll_arm_main_clk",
49 static const char *arm_m4_sel[] = { "osc", "pll_sys_main_240m_clk",
54 static const char *axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk",
58 static const char *disp_axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk",
62 static const char *enet_axi_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
67 static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
72 static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
83 static const char *dram_phym_alt_sel[] = { "osc", "pll_dram_533m_clk",
88 static const char *dram_alt_sel[] = { "osc", "pll_dram_533m_clk",
93 static const char *usb_hsic_sel[] = { "osc", "pll_sys_main_clk",
[all …]
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| D | clk-imx5.c | 66 static const char *lp_apm_sel[] = { "osc", };
82 static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", };
83 static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", };
84 static const char *mx53_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "di_pll4_podf", "dummy", "ldb_…
86 static const char *mx51_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", };
87 static const char *mx53_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", "ldb_di1_…
89 static const char *mx51_tve_ext_sel[] = { "osc", "ckih1", };
110 "osc", "ckih1",
119 static const char *mx51_spdif_xtal_sel[] = { "osc", "ckih", "ckih2", };
120 static const char *mx53_spdif_xtal_sel[] = { "osc", "ckih", "ckih2", "pll4_sw", };
[all …]
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| D | clk-imx6sl.c | 33 static const char *step_sels[] = { "osc", "pll2_pfd2", };
38 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
42 static const char *csi_sels[] = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
46 static const char *perclk_sels[] = { "ipg", "osc", };
54 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
55 static const char *uart_sels[] = { "pll3_80m", "osc", };
59 "pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy",
62 static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
205 hws[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock_hw("osc", 0); in imx6sl_clocks_init()
224 hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f); in imx6sl_clocks_init()
[all …]
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| /linux-5.10/drivers/clk/tegra/ |
| D | clk-tegra-fixed.c | 30 struct clk *clk, *osc; in tegra_osc_clk_init() local
53 osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq); in tegra_osc_clk_init()
54 *dt_clk = osc; in tegra_osc_clk_init()
59 clk = clk_register_fixed_factor(NULL, "osc_div2", "osc", in tegra_osc_clk_init()
67 clk = clk_register_fixed_factor(NULL, "osc_div4", "osc", in tegra_osc_clk_init()
76 clk = clk_register_fixed_factor(NULL, "clk_m", "osc", in tegra_osc_clk_init()
87 clk = clk_register_fixed_factor(NULL, "pll_ref", "osc", in tegra_osc_clk_init()
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| /linux-5.10/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-clock.dtsi | 35 osc: oscillator { label
44 clocks = <&osc>;
54 clocks = <&osc>;
66 clocks = <&osc>;
78 clocks = <&osc>;
88 clocks = <&osc>;
100 clocks = <&osc>;
110 clocks = <&osc>;
121 clocks = <&osc>;
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| /linux-5.10/drivers/clk/loongson1/ |
| D | clk-loongson1b.c | 14 #define OSC (33 * 1000000) macro
26 rate *= OSC; in ls1x_pll_recalc_rate()
44 hw = clk_hw_register_fixed_rate(NULL, "osc_clk", NULL, 0, OSC); in ls1x_clk_init()
47 /* clock derived from 33 MHz OSC clk */ in ls1x_clk_init()
55 * OSC ___/ | MUX |___ CPU CLK in ls1x_clk_init()
73 * OSC ___/ | MUX |___ DC CLK in ls1x_clk_init()
89 * OSC ___/ | MUX |___ DDR CLK in ls1x_clk_init()
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| D | clk-loongson1c.c | 13 #define OSC (24 * 1000000) macro
25 rate *= OSC; in ls1x_pll_recalc_rate()
46 hw = clk_hw_register_fixed_rate(NULL, "osc_clk", NULL, 0, OSC); in ls1x_clk_init()
49 /* clock derived from 24 MHz OSC clk */ in ls1x_clk_init()
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| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | imx7d-clock.yaml | 35 - description: 32k osc
36 - description: 24m osc
41 - const: osc
63 clocks = <&ckil>, <&osc>;
64 clock-names = "ckil", "osc";
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| D | imx6ul-clock.yaml | 32 - description: 32k osc
33 - description: 24m osc
40 - const: osc
65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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| D | imx6sll-clock.yaml | 32 - description: 32k osc
33 - description: 24m osc
40 - const: osc
65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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| D | imx6sx-clock.yaml | 32 - description: 32k osc
33 - description: 24m osc
42 - const: osc
69 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
70 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
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| D | clock-bindings.txt | 83 clocks = <&osc 1>, <&ref 0>;
89 The baud clock is connected to output 1 of the &osc device, and the register
95 osc: oscillator {
99 clock-output-names = "osc";
107 clocks = <&osc 0>;
120 clocks = <&osc 0>, <&pll 1>;
128 * The oscillator is fixed-frequency, and provides one clock output, named "osc".
153 clocks = <&osc 0>, <&pll 1>;
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| D | imx8m-clock.yaml | 61 - description: 32k osc
62 - description: 25m osc
63 - description: 27m osc
83 - description: 32k osc
84 - description: 24m osc
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| D | allwinner,sun4i-a10-osc-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-osc-clk.yaml#
20 const: allwinner,sun4i-a10-osc-clk
45 compatible = "allwinner,sun4i-a10-osc-clk";
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| /linux-5.10/arch/arm/boot/dts/ |
| D | bcm-cygnus-clock.dtsi | 38 osc: oscillator { label
48 clocks = <&osc>;
74 clocks = <&osc>;
101 clocks = <&osc>;
110 clocks = <&osc>;
121 clocks = <&osc>;
129 clocks = <&osc>;
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| /linux-5.10/drivers/clk/zte/ |
| D | clk-zx296702.c | 85 "osc",
92 "osc",
99 "osc",
148 "osc",
153 "osc",
234 clk_register_fixed_rate(NULL, "osc", NULL, 0, 30000000); in zx296702_top_clocks_init()
236 clk_register_zx_pll("pll_a9", "osc", 0, topcrm_base in zx296702_top_clocks_init()
242 clk_register_fixed_rate(NULL, "pll_a9_350M", "osc", 0, in zx296702_top_clocks_init()
245 clk_register_fixed_rate(NULL, "pll_mac_1000M", "osc", 0, in zx296702_top_clocks_init()
248 clk_register_fixed_rate(NULL, "pll_mac_333M", "osc", 0, in zx296702_top_clocks_init()
[all …]
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| /linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/ |
| D | ns2-clock.dtsi | 35 osc: oscillator { label
47 clocks = <&osc>;
60 clocks = <&osc>;
74 clocks = <&osc>;
102 clocks = <&osc>;
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| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | vexpress-sysreg.txt | 73 "arm,vexpress-osc"
84 - second cell of each group defines device number (eg. osc 0,
85 osc 1 etc.)
94 osc@0 {
95 compatible = "arm,vexpress-osc";
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| /linux-5.10/arch/xtensa/boot/dts/ |
| D | xtfpga.dtsi | 23 clocks = <&osc>;
51 osc: main-oscillator { label
66 clocks = <&osc>;
75 clocks = <&osc>;
95 clocks = <&osc>;
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| D | csp.dts | 35 osc: main-oscillator { label
49 clocks = <&osc>, <&osc>;
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| /linux-5.10/drivers/clk/sirf/ |
| D | clk-atlas6.c | 61 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
131 /* These are always available (RTC and 26MHz OSC)*/ in atlas6_clk_init()
133 atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0, in atlas6_clk_init()
143 clk_register_clkdev(atlas6_clks[mem], NULL, "osc"); in atlas6_clk_init()
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| D | clk-prima2.c | 60 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
130 /* These are always available (RTC and 26MHz OSC)*/ in prima2_clk_init()
132 prima2_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL, 0, in prima2_clk_init()
142 clk_register_clkdev(prima2_clks[mem], NULL, "osc"); in prima2_clk_init()
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