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/qemu/disas/
H A Dmips.c24 #include "disas/dis-asm.h"
73 only use ten bits). An optional two-operand form of break/sdbbp
165 but 0x8-0xf don't select bytes. */
167 #define OP_MASK_VECALIGN 0x7 /* Vector byte-align (alni.ob) op. */
355 "+E" 5 bit dinsu/dextu position, which becomes LSB-32 (OP_*_SHAMT).
357 "+F" 5 bit "dinsm/dinsu" size, which becomes MSB-32 (OP_*_INSMSB).
360 "+G" 5 bit "dextm" size, which becomes MSBD-32 (OP_*_EXTMSBD).
381 "P" 5 bit performance-monitor register (OP_*_PERFREG)
386 for pretty-printing in disassembly only.
426 "+T" 5 bit coprocessor 0 destination register (OP_*_RT) - disassembly only
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