operations (full) in projects: linux-6.15

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/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/
D	spec_operation.json	12 "PublicDescription": "Counts operations that have been speculatively executed." 16 …ublicDescription": "Counts micro-operations speculatively executed. This is the count of the numbe… 20 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr… 24 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count… 28 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal… 32 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. For … 36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 40 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 48 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)… [all …]
D	metrics.json	8 … cycles stalled in the backend due to issue queues being full to accept operations for execution.", 82 …on": "This metric measures instruction and data barrier operations as a percentage of operations s… 84 "ScaleUnit": "1percent of operations" 117 …"BriefDescription": "This metric measures branch operations as a percentage of operations speculat… 119 "ScaleUnit": "1percent of operations" 131 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat… 133 "ScaleUnit": "1percent of operations" 152 …n": "This metric measures half-precision floating point operations as a percentage of operations s… 154 "ScaleUnit": "1percent of operations" 159 …: "This metric measures single-precision floating point operations as a percentage of operations s… [all …]
D	stall.json	4 …"PublicDescription": "Counts cycles when frontend could not send any micro-operations to the renam… 8 …": "Counts cycles whenever the rename unit is unable to send any micro-operations to the backend o… 12 …"PublicDescription": "Counts cycles when no operations are sent to the rename unit from the fronte… 16 …"PublicDescription": "Counts slots per cycle in which no operations are sent from the rename unit … 20 …"PublicDescription": "Counts slots per cycle in which no operations are sent to the rename unit fr… 24 …"PublicDescription": "Counts slots per cycle in which no operations are sent to the rename unit fr… 27 …backend could not accept any micro-operations\nbecause the simple integer issue queues are full to… 33 …nd could not accept any micro-operations\nbecause the complex integer issue queues are full and ca… 39 …kend could not accept any micro-operations\nbecause the load/store issue queues are full and can n… 45 …ackend could not accept any micro-operations\nbecause the vector issue queues are full and can not… [all …]
D	sve.json	4 "PublicDescription": "Counts speculatively executed operations that are SVE operations." 8 "PublicDescription": "Counts speculatively executed predicated SVE operations." 12 …"PublicDescription": "Counts speculatively executed predicated SVE operations with no active predi… 16 …"PublicDescription": "Counts speculatively executed predicated SVE operations with all predicate e… 20 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one bu… 24 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one no… 28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations." 32 …ion": "Counts speculatively executed SVE first fault or non-fault load operations that clear at le… 36 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… 40 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… [all …]
D	tlb.json	12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance … 20 …refills caused by memory operations from both data and instruction fetch, except for those caused … 24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations." 28 …are prefetchers, and that this event does not count walks triggered by TLB maintenance operations." 32 …o counted. Also note that this event does not count walks triggered by TLB maintenance operations." 36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a… 40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu… 44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event… 48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event… 52 …lls caused by memory read operations from both data and instruction fetch except for those caused … [all …]
D	l1d_cache.json	4 …el 1 data cache refills caused by speculatively executed load or store operations that missed in t… 8 …ache accesses from any load/store operations. Atomic operations that resolve in the CPUs caches (n… 12 …and cache write-backs from snoops or cache maintenance operations. The following cache operations … 16 …ts cache line refills into the level 1 data cache from any memory read operations, that incurred a… 20 …ounts level 1 data cache accesses from any load operation. Atomic load operations that resolve in … 24 …re operations. This event also counts accesses caused by a DC ZVA (data cache zero, specified by v… 44 …cache line allocation. This event does not count evictions caused by cache maintenance operations." 48 …t of a coherency operation made by another CPU. Event count includes cache maintenance operations." 52 …sed by:\n\n- Cache Maintenance Operations (CMO) that operate by a virtual address.\n- Broadcast ca… 56 …ta demand cache accesses from any load or store operation. Near atomic operations that resolve in … [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
D	spec_operation.json	12 "PublicDescription": "Counts operations that have been speculatively executed." 16 …ublicDescription": "Counts micro-operations speculatively executed. This is the count of the numbe… 20 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr… 24 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count… 28 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal… 32 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. Eg: … 36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 40 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 48 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)… [all …]
D	tlb.json	12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance … 20 …refills caused by memory operations from both data and instruction fetch, except for those caused … 24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations." 28 …able walk are counted. This event does not count table walks caused by TLB maintenance operations." 32 …able walk are counted. This event does not count table walks caused by TLB maintenance operations." 36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a… 40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu… 44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event… 48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event… 52 …lls caused by memory read operations from both data and instruction fetch except for those caused … [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
D	spec_operation.json	12 "PublicDescription": "Counts operations that have been speculatively executed." 16 …ublicDescription": "Counts micro-operations speculatively executed. This is the count of the numbe… 20 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr… 24 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count… 28 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal… 32 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. For … 36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 40 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 48 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)… [all …]
D	tlb.json	12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance … 20 …refills caused by memory operations from both data and instruction fetch, except for those caused … 24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations." 28 …are prefetchers, and that this event does not count walks triggered by TLB maintenance operations." 32 …o counted. Also note that this event does not count walks triggered by TLB maintenance operations." 36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a… 40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu… 44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event… 48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event… 52 …lls caused by memory read operations from both data and instruction fetch except for those caused … [all …]
D	sve.json	4 "PublicDescription": "Counts speculatively executed operations that are SVE operations." 8 "PublicDescription": "Counts speculatively executed predicated SVE operations." 12 …"PublicDescription": "Counts speculatively executed predicated SVE operations with no active predi… 16 …"PublicDescription": "Counts speculatively executed predicated SVE operations with all predicate e… 20 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one bu… 24 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one no… 28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations." 32 …ion": "Counts speculatively executed SVE first fault or non-fault load operations that clear at le… 36 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… 40 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
D	spec_operation.json	12 "PublicDescription": "Counts operations that have been speculatively executed." 16 …operations issued by the CPU. This event counts unaligned accesses (as defined by the actual instr… 20 …"PublicDescription": "Counts unaligned memory write operations issued by the CPU. This event count… 24 …"PublicDescription": "Counts unaligned memory operations issued by the CPU. This event counts unal… 28 …"PublicDescription": "Counts Load-Exclusive operations that have been speculatively executed. Eg: … 32 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 36 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 40 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 44 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)… 48 … "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD)… [all …]
D	tlb.json	12 …tions can be broken up into multiple memory operations. This event does not count TLB maintenance … 20 …refills caused by memory operations from both data and instruction fetch, except for those caused … 24 …ublicDescription": "Counts level 2 TLB accesses except those caused by TLB maintenance operations." 28 …able walk are counted. This event does not count table walks caused by TLB maintenance operations." 32 …able walk are counted. This event does not count table walks caused by TLB maintenance operations." 36 …"PublicDescription": "Counts level 1 data TLB refills caused by memory read operations. If there a… 40 …on": "Counts level 1 data TLB refills caused by data side memory write operations. If there are mu… 44 …memory read operations. This event counts whether the access hits or misses in the TLB. This event… 48 …emory write operations. This event counts whether the access hits or misses in the TLB. This event… 52 …lls caused by memory read operations from both data and instruction fetch except for those caused … [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
D	tlb.json	4 …"BriefDescription": "This event counts operations that cause a TLB refill of the L1I TLB. See L1I_… 8 …"BriefDescription": "This event counts operations that cause a TLB refill of the L1D TLB. See L1D_… 12 …"BriefDescription": "This event counts operations that cause a TLB access to the L1D TLB. See L1D_… 16 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I TLB. See L1I_… 20 …"BriefDescription": "This event counts operations that cause a TLB refill of the L2D TLB. See L2D_… 24 …"BriefDescription": "This event counts operations that cause a TLB access to the L2D TLB. See L2D_… 37 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 4KB page." 42 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 64KB page." 47 … "BriefDescription": "This event counts operations that cause a TLB access to the L1I in 2MB page." 52 …"BriefDescription": "This event counts operations that cause a TLB access to the L1I in 32MB page." [all …]
D	sve.json	16 … "BriefDescription": "This event counts architecturally executed Advanced SIMD and SVE operations." 20 "BriefDescription": "This event counts all architecturally executed micro-operations." 24 …"BriefDescription": "This event counts architecturally executed math function operations due to th… 28 …"BriefDescription": "This event counts architecturally executed operations due to scalar, Advanced… 32 …ounts architecturally executed floating-point fused multiply-add and multiply-subtract operations." 36 …ent counts architecturally executed floating-point reciprocal estimate operations due to the Advan… 40 …n": "This event counts architecturally executed floating-point convert operations due to the scala… 44 … "BriefDescription": "This event counts architecturally executed Advanced SIMD integer operations." 48 "BriefDescription": "This event counts architecturally executed SVE integer operations." 52 …escription": "This event counts architecturally executed Advanced SIMD and SVE integer operations." [all …]
D	fp_operation.json	5 … "BriefDescription": "This event counts architecturally executed floating-point move operations." 10 …"BriefDescription": "This event counts architecturally executed NOSIMD load operations that using … 15 …"BriefDescription": "This event counts architecturally executed NOSIMD store operations that using… 27 …ion": "This event counts architecturally executed Advanced SIMD and SVE floating-point operations." 43 …nt counts architecturally executed Advanced SIMD and SVE half-precision floating-point operations." 59 … counts architecturally executed Advanced SIMD and SVE single-precision floating-point operations." 75 … counts architecturally executed Advanced SIMD and SVE double-precision floating-point operations." 91 …This event counts architecturally executed Advanced SIMD and SVE floating-point divide operations." 107 …event counts architecturally executed Advanced SIMD and SVE floating-point square root operations." 119 …: "This event counts architecturally executed Advanced SIMD and SVE floating-point FMA operations." [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/arm/neoverse-n3/
D	spec_operation.json	12 "PublicDescription": "Counts operations that have been speculatively executed." 16 …ublicDescription": "Counts micro-operations speculatively executed. This is the count of the numbe… 20 …"PublicDescription": "Counts store-exclusive operations that have been speculatively executed and … 24 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 28 …: "Counts speculatively executed load operations including Single Instruction Multiple Data (SIMD)… 32 … "Counts speculatively executed store operations including Single Instruction Multiple Data (SIMD)… 36 …on": "Counts speculatively executed logical or arithmetic instructions such as MOV/MVN operations." 40 …: "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-ope… 44 …ion": "Counts speculatively executed floating point operations. This event does not count operatio… 48 …s speculatively executed operations which cause software changes of the PC. Those operations inclu… [all …]
D	metrics.json	8 … cycles stalled in the backend due to issue queues being full to accept operations for execution.", 82 …on": "This metric measures instruction and data barrier operations as a percentage of operations s… 84 "ScaleUnit": "1percent of operations" 117 …"BriefDescription": "This metric measures branch operations as a percentage of operations speculat… 119 "ScaleUnit": "1percent of operations" 131 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat… 133 "ScaleUnit": "1percent of operations" 152 …n": "This metric measures half-precision floating point operations as a percentage of operations s… 154 "ScaleUnit": "1percent of operations" 159 …: "This metric measures single-precision floating point operations as a percentage of operations s… [all …]
D	sve.json	4 "PublicDescription": "Counts speculatively executed operations that are SVE operations." 8 "PublicDescription": "Counts speculatively executed predicated SVE operations." 12 …"PublicDescription": "Counts speculatively executed predicated SVE operations with no active predi… 16 …"PublicDescription": "Counts speculatively executed predicated SVE operations with all predicate e… 20 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one bu… 24 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one no… 28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations." 32 …ion": "Counts speculatively executed SVE first fault or non-fault load operations that clear at le… 36 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… 40 …"PublicDescription": "Counts speculatively executed Advanced SIMD or SVE integer operations with t… [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
D	instruction.json	66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t… 69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th… 72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.", 75 "BriefDescription": "This event counts architecturally executed floating-point move operations." 78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r… 81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re… 84 …cDescription": "This event counts architecturally executed inter-element manipulation operations.", 87 …efDescription": "This event counts architecturally executed inter-element manipulation operations." 90 …Description": "This event counts architecturally executed inter-register manipulation operations.", 93 …fDescription": "This event counts architecturally executed inter-register manipulation operations." [all …]
/linux-6.15/tools/memory-model/Documentation/
D	ordering.txt	2 operations provided by the Linux-kernel memory model (LKMM). 9 operations in decreasing order of strength: 12 all of the CPU's prior operations against some or all of its 13 subsequent operations. 15 2. Ordered memory accesses. These operations order themselves 23 some of these "unordered" operations provide limited ordering 62 o Value-returning RMW atomic operations whose names do not end in 82 Second, some RMW atomic operations provide full ordering. These 83 operations include value-returning RMW atomic operations (that is, those 86 cmpxchg(), and xchg(). Note that conditional RMW atomic operations such [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/
D	uncore-hha.json	5 "BriefDescription": "The number of all operations received by the HHA", 6 "PublicDescription": "The number of all operations received by the HHA", 12 "BriefDescription": "The number of all operations received by the HHA from another socket", 13 "PublicDescription": "The number of all operations received by the HHA from another socket", 19 …"BriefDescription": "The number of all operations received by the HHA from another SCCL in this so… 20 …"PublicDescription": "The number of all operations received by the HHA from another SCCL in this s… 26 "BriefDescription": "Count of the number of operations that HHA has received from CCIX", 27 "PublicDescription": "Count of the number of operations that HHA has received from CCIX", 48 "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes", 49 "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes", [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/
D	common-and-microarch.json	341 …ro-operation speculatively executed. The counter counts the number of operations executed by the … 555 "PublicDescription": "ASE operations speculatively executed", 558 "BriefDescription": "ASE operations speculatively executed" 561 "PublicDescription": "SVE operations speculatively executed", 564 "BriefDescription": "SVE operations speculatively executed" 572 "PublicDescription": "Microarchitectural operation, Operations speculatively executed.", 575 "BriefDescription": "Microarchitectural operation, Operations speculatively executed." 578 "PublicDescription": "SVE Math accelerator Operations speculatively executed.", 581 "BriefDescription": "SVE Math accelerator Operations speculatively executed." 584 "PublicDescription": "Floating-point Operations speculatively executed.", [all …]
/linux-6.15/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
D	metrics.json	75 …iefDescription": "This metric measures advanced SIMD operations as a percentage of total operation… 77 "ScaleUnit": "100percent of operations" 82 …"BriefDescription": "This metric measures crypto operations as a percentage of operations speculat… 84 "ScaleUnit": "100percent of operations" 89 "BriefDescription": "Giga-floating point operations per second", 95 …BriefDescription": "This metric measures scalar integer operations as a percentage of operations s… 97 "ScaleUnit": "100percent of operations" 109 …"BriefDescription": "This metric measures load operations as a percentage of operations speculativ… 111 "ScaleUnit": "100percent of operations" 118 "ScaleUnit": "100percent of operations" [all …]
/linux-6.15/Documentation/
D	atomic_bitops.txt	5 While our bitmap_{}() functions are non-atomic, we have a number of operations 12 The single bit operations are: 18 RMW atomic operations without return value: 23 RMW atomic operations with return value: 33 All RMW atomic operations have a '__' prefixed variant which is non-atomic. 47 The test_and_{}_bit() operations return the original value of the bit. 55 - non-RMW operations are unordered; 57 - RMW operations that have no return value are unordered; 59 - RMW operations that have a return value are fully ordered. 61 - RMW operations that are conditional are fully ordered. [all …]

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