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/linux-5.10/drivers/net/ethernet/chelsio/cxgb4/
Dcudbg_lib.c1 // SPDX-License-Identifier: GPL-2.0-only
82 /* 1 addr reg SGE_QBASE_INDEX and 4 data reg SGE_QBASE_MAP[0-3] */
187 switch (CHELSIO_CHIP_VERSION(adap->params.chip)) { in cudbg_get_entity_length()
200 len = adap->params.devlog.size; in cudbg_get_entity_length()
203 if (is_t6(adap->params.chip)) { in cudbg_get_entity_length()
204 len = adap->params.cim_la_size / 10 + 1; in cudbg_get_entity_length()
207 len = adap->params.cim_la_size / 8; in cudbg_get_entity_length()
286 len = adap->params.arch.vfcount * in cudbg_get_entity_length()
299 switch (CHELSIO_CHIP_VERSION(adap->params.chip)) { in cudbg_get_entity_length()
356 adap->params.arch.mps_tcam_size; in cudbg_get_entity_length()
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Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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Dcxgb4.h4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
61 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
138 FEC_RS = 1 << 1, /* Reed-Solomon */
139 FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
184 __u8 size512; /* Current Image Size in units of 512 bytes */
186 __u8 cksum; /* Checksum computed on the entire Image */
262 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
263 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
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/linux-5.10/drivers/net/ethernet/micrel/
Dks8851_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
34 * struct ks8851_net_spi - KS8851 SPI driver private data
39 * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
40 * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
44 * The @lock ensures that the chip is protected when certain operations are
46 * of the chip registers are not ccessible until the transfer is finished and
47 * the DMA has been de-asserted.
68 /* shift for byte-enable data */
71 /* turn register number and byte-enable mask into data for start of packet */
76 * ks8851_lock_spi - register access lock
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/linux-5.10/drivers/media/radio/wl128x/
Dfmdrv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * FM Driver for Connectivity chip of Texas Instruments.
5 * Common header for all FM driver sub-modules.
18 #include <media/v4l2-ioctl.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-ctrls.h>
66 u8 buff[FM_RX_RDS_INFO_FIELD_MAX]; member
111 u8 flag; /* RX RDS on/off status */
116 u32 buf_size; /* Size is always multiple of 3 */
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Dfmdrv_common.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * FM Driver for Connectivity chip of Texas Instruments.
5 * This sub-module of FM driver is common for FM RX and TX
7 * 1) Forming group of Channel-8 commands to perform particular
9 * one Channel-8 command to be sent to the chip).
10 * 2) Sending each Channel-8 command to the chip and reading
14 * 5) Loading FM firmware to the chip (common, FM TX, and FM RX
15 * firmware files based on mode selection)
63 static u32 radio_nr = -1;
172 fmdev->irq_info.handlers[fmdev->irq_info.stage](fmdev); in fm_irq_call()
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/linux-5.10/Documentation/devicetree/bindings/usb/
Dcdns,usb3.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller bindings
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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/linux-5.10/drivers/usb/host/
Dfhci-tds.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Jerry Huang <Chang-Ming.Huang@freescale.com>
30 #define TD_I 0x1000 /* interrupt on completion */
33 #define TD_CNF 0x0200 /* CNF - Must be always 1 */
34 #define TD_LSP 0x0100 /* Low-speed transaction */
84 if (!ep->already_pushed_dummy_bd) { in fhci_push_dummy_bd()
85 u16 td_status = in_be16(&ep->empty_td->status); in fhci_push_dummy_bd()
87 out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER); in fhci_push_dummy_bd()
89 ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status); in fhci_push_dummy_bd()
90 ep->already_pushed_dummy_bd = true; in fhci_push_dummy_bd()
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/linux-5.10/drivers/net/ethernet/netronome/nfp/nfpcore/
Dnfp_cppcore.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
6 * Provides low-level access to the NFP's internal CPP bus
39 * struct nfp_cpp - main nfpcore device structure
40 * Following fields are read-only after probe() exits or netdevs are spawned.
42 * @op: low-level implementation ops
43 * @priv: private data of the low-level implementation
44 * @model: chip model
45 * @interface: chip interface id we are using to reach it
46 * @serial: chip serial number
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/linux-5.10/drivers/mtd/nand/raw/
Dfsmc_nand.c1 // SPDX-License-Identifier: GPL-2.0
11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8)
19 #include <linux/dma-direction.h>
20 #include <linux/dma-mapping.h>
36 #include <mtd/mtd-abi.h>
111 * struct fsmc_nand_data - structure for FSMC NAND device state
114 * @pid: Part ID on the AMBA PrimeCell format
115 * @nand: Chip related info for a NAND flash.
161 struct nand_chip *chip = mtd_to_nand(mtd); in fsmc_ecc1_ooblayout_ecc() local
163 if (section >= chip->ecc.steps) in fsmc_ecc1_ooblayout_ecc()
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Dsh_flctl.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on fsl_elbc_nand.c, Copyright (c) 2006-2007 Freescale Semiconductor
16 #include <linux/dma-mapping.h>
35 struct nand_chip *chip = mtd_to_nand(mtd); in flctl_4secc_ooblayout_sp_ecc() local
38 return -ERANGE; in flctl_4secc_ooblayout_sp_ecc()
40 oobregion->offset = 0; in flctl_4secc_ooblayout_sp_ecc()
41 oobregion->length = chip->ecc.bytes; in flctl_4secc_ooblayout_sp_ecc()
50 return -ERANGE; in flctl_4secc_ooblayout_sp_free()
52 oobregion->offset = 12; in flctl_4secc_ooblayout_sp_free()
53 oobregion->length = 4; in flctl_4secc_ooblayout_sp_free()
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/linux-5.10/drivers/net/ethernet/amd/
Dpcnet32.c3 * Copyright 1996-1999 Thomas Bogendoerfer
85 static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
113 PCNET32_PORT_ASEL, /* 0 Auto-select */
117 PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */
123 PCNET32_PORT_MII | PCNET32_PORT_FD, /* 10 MII 10baseT-FD */
127 /* 14 MII 100BaseTx-FD */
140 #define MAX_UNITS 8 /* More are supported, limit only on options */
175 #define PKT_BUF_SIZE (PKT_BUF_SKB - NET_IP_ALIGN)
176 /* chip wants twos complement of the (aligned) buffer length */
177 #define NEG_BUF_SIZE (NET_IP_ALIGN - PKT_BUF_SKB)
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/linux-5.10/drivers/mfd/
Dsm501.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <linux/platform_data/i2c-gpio.h>
25 #include <linux/sm501-regs.h>
135 unsigned long misct = smc501_readl(sm->regs + SM501_MISC_TIMING); in sm501_dump_clk()
136 unsigned long pm0 = smc501_readl(sm->regs + SM501_POWER_MODE_0_CLOCK); in sm501_dump_clk()
137 unsigned long pm1 = smc501_readl(sm->regs + SM501_POWER_MODE_1_CLOCK); in sm501_dump_clk()
138 unsigned long pmc = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); in sm501_dump_clk()
163 dev_dbg(sm->dev, "MISCT=%08lx, PM0=%08lx, PM1=%08lx\n", in sm501_dump_clk()
166 dev_dbg(sm->dev, "PLL2 = %ld.%ld MHz (%ld), SDCLK0=%08lx, SDCLK1=%08lx\n", in sm501_dump_clk()
169 dev_dbg(sm->dev, "SDRAM: PM0=%ld, PM1=%ld\n", sdclk0, sdclk1); in sm501_dump_clk()
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/linux-5.10/drivers/net/ethernet/freescale/
Dfec.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * fec.h -- Fast Ethernet Controller for Motorola ColdFire SoC
8 * (C) Copyright 2000-2005, Greg Ungerer (gerg@snapgear.com)
9 * (C) Copyright 2000-2001, Lineo (www.lineo.com)
27 * registers in the same peripheral device on different models
58 #define FEC_R_BUFF_SIZE_1 0x168 /* Maximum receive buff ring1 size */
61 #define FEC_R_BUFF_SIZE_2 0x174 /* Maximum receive buff ring2 size */
64 #define FEC_R_BUFF_SIZE_0 0x188 /* Maximum receive buff size */
173 #define FEC_R_BUFF_SIZE_0 0x3d8 /* Maximum receive buff size */
177 /* Not existed in real chip
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/linux-5.10/drivers/bluetooth/
Dbtrtl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
212 if (skb->len != sizeof(struct hci_rp_read_local_version)) { in btrtl_read_local_version()
215 return ERR_PTR(-EIO); in btrtl_read_local_version()
234 if (skb->len != sizeof(*rom_version)) { in rtl_read_rom_version()
237 return -EIO; in rtl_read_rom_version()
240 rom_version = (struct rtl_rom_version_evt *)skb->data; in rtl_read_rom_version()
242 rom_version->status, rom_version->version); in rtl_read_rom_version()
244 *version = rom_version->version; in rtl_read_rom_version()
260 int project_id = -1; in rtlbt_parse_firmware()
281 if (btrtl_dev->fw_len < min_size) in rtlbt_parse_firmware()
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/linux-5.10/drivers/misc/genwqe/
Dcard_utils.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
20 #include <linux/page-flags.h>
25 #include <linux/dma-mapping.h>
37 * __genwqe_writeq() - Write 64-bit register
40 * @val: 64-bit value
46 struct pci_dev *pci_dev = cd->pci_dev; in __genwqe_writeq()
48 if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE) in __genwqe_writeq()
49 return -EIO; in __genwqe_writeq()
51 if (cd->mmio == NULL) in __genwqe_writeq()
[all …]
Dcard_base.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
42 #define GENWQE_DDCB_MAX 32 /* DDCBs on the work-queue */
62 #define PCI_SUBSYSTEM_ID_GENWQE5 0x035f /* Genwqe A5 Subsystem-ID */
63 #define PCI_SUBSYSTEM_ID_GENWQE5_NEW 0x044b /* Genwqe A5 Subsystem-ID */
67 #define PCI_SUBSYSTEM_ID_GENWQE5_SRIOV 0x0000 /* Genwqe A5 Subsystem-ID */
73 * struct genwqe_reg - Genwqe data dump functionality
82 * enum genwqe_dbg_type - Specify chip unit to dump/debug
99 #define GENWQE_INJECT_HARDWARE_FAILURE 0x00000001 /* injects -1 reg reads */
107 * Error-handling in case of card malfunction
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/linux-5.10/drivers/net/ethernet/i825xx/
Dsun3_82586.h7 * copyrights (c) 1994 by Michael Hipp (hippm@informatik.uni-tuebingen.de)
10 * crynwr-packet-driver by Russ Nelson
11 * Garret A. Wollman's i82586-driver for BSD
21 /* defines for the obio chip (not vme) */
23 #define IEOB_ONAIR 0x40 /* put us on the air */
52 char *iscp; /* pointer to the iscp-block */
64 char *scb_base; /* base-address of all 16-bit offsets */
78 unsigned short crc_errs; /* CRC-Error counter */
88 #define RUC_NOP 0x0000 /* NOP-command */
95 #define CUC_NOP 0x00 /* NOP-command */
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/linux-5.10/drivers/net/wireless/intel/iwlwifi/mvm/
Drs.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation. All rights reserved.
5 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
6 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
10 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #include "fw-api.h"
26 #include "iwl-op-mode.h"
103 RS_ACTION_DOWNSCALE = -1,
136 return iwl_mvm_bt_coex_is_ant_avail(mvm, next_col->ant); in rs_ant_allow()
143 if (!sta->ht_cap.ht_supported) in rs_mimo_allow()
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/linux-5.10/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
31 [DSAF_MODE_DISABLE_SP] = "single-port",
51 struct device_node *np = dsaf_dev->dev->of_node, *np_temp; in hns_dsaf_get_cfg()
52 struct platform_device *pdev = to_platform_device(dsaf_dev->dev); in hns_dsaf_get_cfg()
54 if (dev_of_node(dsaf_dev->dev)) { in hns_dsaf_get_cfg()
55 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1")) in hns_dsaf_get_cfg()
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/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_ethtool.c3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * Based on code from Michael Chan's bnx2 driver
32 /* Note: in the format strings below %s is replaced by the queue-name which is
34 * length does not exceed ETH_GSTRING_LEN - MAX_QUEUE_NAME_LEN + 2
39 int size; member
76 int size; member
196 switch (bp->link_params.phy[phy_idx].media_type) { in bnx2x_get_port_type()
228 cmd->link_modes.supported); in bnx2x_get_vf_link_ksettings()
230 cmd->link_modes.advertising); in bnx2x_get_vf_link_ksettings()
232 if (bp->state == BNX2X_STATE_OPEN) { in bnx2x_get_vf_link_ksettings()
[all …]
/linux-5.10/drivers/scsi/qla2xxx/
Dqla_nx2.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
36 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()
42 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()
49 struct qla_hw_data *ha = vha->hw; in qla8044_rd_direct()
62 struct qla_hw_data *ha = vha->hw; in qla8044_wr_direct()
73 struct qla_hw_data *ha = vha->hw; in qla8044_set_win_base()
75 qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr); in qla8044_set_win_base()
76 val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum)); in qla8044_set_win_base()
92 struct qla_hw_data *ha = vha->hw; in qla8044_rd_reg_indirect()
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/linux-5.10/drivers/gpu/drm/sti/
Dsti_gdp.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
146 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
147 readl(gdp->regs + reg ## _OFFSET))
187 if (gdp->node_list[i].top_field_paddr == val) { in gdp_dbg_nvn()
188 base = gdp->node_list[i].top_field; in gdp_dbg_nvn()
191 if (gdp->node_list[i].btm_field_paddr == val) { in gdp_dbg_nvn()
192 base = gdp->node_list[i].btm_field; in gdp_dbg_nvn()
204 seq_puts(s, "\tNot displayed on mixer!"); in gdp_dbg_ppt()
215 struct drm_info_node *node = s->private; in gdp_dbg_show()
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/linux-5.10/arch/arm/mach-pxa/
Dstargate2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/stargate2.c
22 #include <linux/mtd/plat-ram.h>
25 #include <linux/platform_data/i2c-pxa.h>
36 #include <asm/mach-types.h>
45 #include <linux/platform_data/mmc-pxamci.h>
47 #include "pxa27x-udc.h"
80 /* 802.15.4 radio - driver out of mainline */
92 /* SSP 3 - 802.15.4 radio */
93 GPIO39_GPIO, /* Chip Select */
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/linux-5.10/drivers/usb/storage/
Disd200.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Transport & Protocol Driver for In-System Design, Inc. ISD200 ASIC
6 * (C) 2001-2002 Björn Stenberg (bjorn@haxx.se)
12 * (C) 2000 In-System Design, Inc. (support@in-system.com)
14 * The ISD200 ASIC does not natively support ATA devices. The chip
20 * 2002-10-19: Removed the specialized transfer routines.
22 * 2001-02-24: Removed lots of duplicate code and simplified the structure.
24 * 2002-01-16: Fixed endianness bug so it works on the ppc arch.
26 * 2002-01-17: All bitfields removed.
51 #define DRV_NAME "ums-isd200"
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