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/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
[all …]
Dfsl-spi.txt4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
24 the cs-gpios property is not present.
28 cell-index = <0>;
[all …]
Dspi-fsl-dspi.txt4 - compatible : must be one of:
5 "fsl,vf610-dspi",
6 "fsl,ls1021a-v1.0-dspi",
7 "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
8 "fsl,ls1028a-dspi",
9 "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
10 "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
11 "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
12 "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"),
13 "fsl,ls2085a-dspi",
[all …]
Dqcom,spi-qup.txt4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
19 - clock-names: Should be "core" for the core clock and "iface" for the
22 - #address-cells: Number of cells required to define a chip select
[all …]
Dspi-samsung.txt8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
24 - dma-names: Names for the dma channels. There must be at least one channel
[all …]
/linux-5.10/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt3 SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
8 transfers without releasing their chipselects.
10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
[all …]
/linux-5.10/arch/mips/boot/dts/qca/
Dar9331_omega.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
23 compatible = "gpio-leds";
28 default-state = "off";
32 gpio-keys {
33 compatible = "gpio-keys";
34 #address-cells = <1>;
35 #size-cells = <0>;
[all …]
Dar9331_dpt_module.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
11 model = "DPTechnics DPT-Module";
12 compatible = "dptechnics,dpt-module";
24 compatible = "gpio-leds";
26 led-0 {
30 default-state = "off";
[all …]
Dar9331_dragino_ms14.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
23 compatible = "gpio-leds";
28 default-state = "off";
34 default-state = "off";
40 default-state = "off";
46 default-state = "off";
50 gpio-keys {
[all …]
Dar9331_tl_mr3020.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
10 model = "TP-Link TL-MR3020";
11 compatible = "tplink,tl-mr3020";
23 compatible = "gpio-leds";
26 label = "tp-link:green:wlan";
28 default-state = "off";
32 label = "tp-link:green:lan";
[all …]
/linux-5.10/drivers/bus/
Darm-integrator-lm.c1 // SPDX-License-Identifier: GPL-2.0-only
31 static int integrator_lm_populate(int num, struct device *dev) in integrator_lm_populate() argument
33 struct device_node *np = dev->of_node; in integrator_lm_populate()
38 base = INTEGRATOR_AP_EXP_BASE + (num * INTEGRATOR_AP_EXP_STRIDE); in integrator_lm_populate()
40 /* Walk over the child nodes and see what chipselects we use */ in integrator_lm_populate()
66 { .compatible = "arm,integrator-ap-syscon"},
72 struct device *dev = &pdev->dev; in integrator_ap_lm_probe()
84 return -ENODEV; in integrator_ap_lm_probe()
114 { .compatible = "arm,integrator-ap-lm"},
121 .name = "integratorap-lm",
/linux-5.10/arch/arm/boot/dts/
Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
44 gpio-keys {
45 compatible = "gpio-keys";
61 compatible = "spi-gpio";
62 num-chipselects = <1>;
63 gpio-sck = <&chipcommon 21 0>;
64 gpio-miso = <&chipcommon 22 0>;
65 gpio-mosi = <&chipcommon 23 0>;
66 cs-gpios = <&chipcommon 24 0>;
[all …]
Dvfxxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <24000000>;
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
[all …]
Dbcm47081-buffalo-wzr-900dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-900DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-900DHP (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dbcm47081-buffalo-wzr-600dhp2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-600DHP2
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-600DHP2 (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
19 spi2_pins_cfa10056: spi2-cfa10056@0 {
21 fsl,pinmux-ids = <
27 fsl,drive-strength = <MXS_DRIVE_8mA>;
29 fsl,pull-up = <MXS_PULL_ENABLE>;
32 lcdif_pins_cfa10056: lcdif-10056@0 {
[all …]
Dbcm4708-buffalo-wzr-1750dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1750DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
16 model = "Buffalo WZR-1750DHP (BCM4708)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dimx28-cfa10055.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * The CFA-10055 is an expansion board for the CFA-10036 module and
9 * CFA-10037, thus we need to include the CFA-10037 DTS.
11 #include "imx28-cfa10037.dts"
14 model = "Crystalfontz CFA-10055 Board";
20 spi2_pins_cfa10055: spi2-cfa10055@0 {
22 fsl,pinmux-ids = <
28 fsl,drive-strength = <MXS_DRIVE_8mA>;
30 fsl,pull-up = <MXS_PULL_ENABLE>;
33 lcdif_18bit_pins_cfa10055: lcdif-18bit@0 {
[all …]
Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
[all …]
Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
18 compatible = "gpio-beeper";
23 stdout-path = &uart6;
26 gpio_buttons: gpio-keys {
27 compatible = "gpio-keys";
29 button-0 {
36 button-1 {
[all …]
/linux-5.10/arch/powerpc/boot/dts/fsl/
Dbsc9131si-post.dtsi4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
46 compatible = "fsl,bsc9131-immr", "simple-bus";
47 bus-frequency = <0>; // Filled out by uboot.
49 ecm-law@0 {
50 compatible = "fsl,ecm-law";
[all …]
Dp1021si-post.dtsi4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
[all …]
Dp1020si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
56 #size-cells = <2>;
[all …]
Dc293si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
44 compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
[all …]

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