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/linux-5.10/Documentation/devicetree/bindings/ata/
Dimx-sata.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/imx-sata.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
19 - fsl,imx53-ahci
20 - fsl,imx6q-ahci
21 - fsl,imx6qp-ahci
31 - description: sata clock
32 - description: sata reference clock
[all …]
/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c5 * Copyright 2007-2009 Stuart Bennett
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
58 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
72 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_bind_head()
84 if (dcbent->type == DCB_OUTPUT_LVDS) in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
90 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
[all …]
/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
Ddce120_clk_mgr.c2 * Copyright 2012-16 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
36 /*ClocksStateInvalid - should not be used*/
38 /*ClocksStateUltraLow - currently by HW design team not supposed to be used*/
48 * dce121_clock_patch_xgmi_ss_info() - Save XGMI spread spectrum info
51 * Reads from VBIOS the XGMI spread spectrum info and saves it within
54 * sets the ->xgmi_enabled flag.
60 struct dc_bios *bp = clk_mgr_dce->base.ctx->dc_bios; in dce121_clock_patch_xgmi_ss_info()
62 clk_mgr_dce->xgmi_enabled = false; in dce121_clock_patch_xgmi_ss_info()
64 result = bp->funcs->get_spread_spectrum_info(bp, AS_SIGNAL_TYPE_XGMI, in dce121_clock_patch_xgmi_ss_info()
[all …]
/linux-5.10/drivers/scsi/isci/
Dprobe_roms.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
89 * 0 indicates that no ALIGN primitives will be inserted.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
125 * These timer values specifies how long a link will remain open with no
142 * This timer value specifies how long a link will remain open with no
[all …]
/linux-5.10/arch/arm/boot/dts/
Dimx6q-cubox-i-som-v15.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad (1.5som)";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
[all …]
Dimx6q-cubox-i.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-brcm.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
[all …]
Dimx6q-cubox-i-emmc-som-v15.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-sr-som-emmc.dtsi"
47 #include "imx6qdl-cubox-i.dtsi"
50 model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
51 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
56 fsl,transmit-level-mV = <1104>;
[all …]
Dimx6q-hummingboard2-emmc-som-v15.dts3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-emmc.dtsi"
49 #include "imx6qdl-sr-som-ti.dtsi"
50 #include "imx6qdl-hummingboard2.dtsi"
59 fsl,transmit-level-mV = <1104>;
60 fsl,transmit-boost-mdB = <0>;
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Dimx6q-hummingboard2.dts2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
5 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 /dts-v1/;
45 #include "imx6qdl-sr-som.dtsi"
46 #include "imx6qdl-sr-som-brcm.dtsi"
47 #include "imx6qdl-hummingboard2.dtsi"
48 #include "imx6qdl-hummingboard2-emmc.dtsi"
57 fsl,transmit-level-mV = <1104>;
58 fsl,transmit-boost-mdB = <0>;
[all …]
Dimx6q-hummingboard2-som-v15.dts3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-ti.dtsi"
49 #include "imx6qdl-hummingboard2.dtsi"
58 fsl,transmit-level-mV = <1104>;
59 fsl,transmit-boost-mdB = <0>;
60 fsl,transmit-atten-16ths = <9>;
[all …]
Dimx6q-dms-ba16.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx6q-ba16.dtsi"
9 model = "Advantech DMS-BA16";
10 compatible = "advantech,imx6q-dms-ba16", "advantech,imx6q-ba16", "fsl,imx6q";
12 reg_usb_otg_vbus: regulator-usbotgvbus {
13 compatible = "regulator-fixed";
14 regulator-name = "usb_otg_vbus";
15 regulator-min-microvolt = <5000000>;
[all …]
/linux-5.10/drivers/gpu/drm/amd/pm/inc/
Dsmu11_driver_if_sienna_cichlid.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
54 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
55 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
56 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
57 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
58 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
59 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
61 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
[all …]
Dsmu11_driver_if_arcturus.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
44 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
45 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
46 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
47 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
48 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
49 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
51 #define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)
52 #define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)
[all …]
Dsmu11_driver_if_navi10.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
50 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
51 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
52 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
53 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
54 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
55 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
56 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
57 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
58 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
[all …]
/linux-5.10/drivers/gpu/drm/amd/display/include/
Dddc_service_types.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
88 /* support for Spread Spectrum(SS) */
90 /* DP link settings (laneCount, linkRate, Spread) */
96 indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
Dbios_parser_types.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
38 AS_SIGNAL_TYPE_NONE = 0L, /* no signal */
49 BP_RESULT_OK = 0, /* There was no error */
195 /* Input: Signal Type - to be converted to Encoder mode */
205 /* Output: If non-zero, this refDiv value should be used to calculate
208 /* Output: If non-zero, this postDiv value should be used to calculate
211 /* Input: Enable spread spectrum */
218 /* signal_type -> Encoder Mode - needed by VBIOS Exec table */
232 /* VBIOS returns a fixed display clock when DFS-bypass feature
[all …]
/linux-5.10/arch/mips/cavium-octeon/
Docteon-usb.c4 * Copyright (C) 2010-2017 Cavium Networks
37 /* 1 = Spread-spectrum clock enable, 0 = SS clock disable */
39 /* Spread-spectrum clock modulation range:
40 * 0x0 = -4980 ppm downspread
41 * 0x1 = -4492 ppm downspread
42 * 0x2 = -4003 ppm downspread
43 * 0x3 - 0x7 = Reserved
46 /* Enable non-standard oscillator frequencies:
47 * [55:53] = modules -1
51 /* Reference clock multiplier for non-standard frequencies:
[all …]
/linux-5.10/Documentation/devicetree/bindings/pci/
Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
18 - brcm,bcm7278-pcie # Broadcom 7278 Arm
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
[all …]
/linux-5.10/drivers/gpu/drm/amd/include/
Datomfirmware.h6 * Description header file of general definitions for OS nd pre-OS video drivers
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
238 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
460 …ion==1, then this an info table for atomworks to use during debug session, no structure is associa…
595 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
596 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
644 eDP_TO_LVDS_RX_DISABLE = 0x00, // no eDP->LVDS translator chip
[all …]
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
[all …]
/linux-5.10/drivers/gpu/drm/radeon/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
[all …]
/linux-5.10/drivers/phy/xilinx/
Dphy-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.
5 * Copyright (C) 2018-2020 Xilinx Inc.
26 #include <dt-bindings/phy/phy.h>
32 /* TX De-emphasis parameters */
170 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
173 * @steps: number of steps of SSC (Spread Spectrum Clock)
184 * struct xpsgtr_phy - representation of a lane
204 * struct xpsgtr_dev - representation of a ZynMP GT device
210 * @refclk_sscs: spread spectrum settings for the reference clocks
[all …]
/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr_internal.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
73 clk_mgr->base.ctx
76 clk_mgr->base.ctx->logger
238 /* Cache the status of DFS-bypass feature*/
240 /* True if the DFS-bypass feature is enabled and active. */
245 * Cache the display clock returned by VBIOS if DFS-bypass is enabled.
253 * True if spread spectrum is enabled on the DP ref clock.
268 * DPREFCLK SS percentage (if down-spread enabled).
/linux-5.10/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
55 bp->base.ctx->logger
57 #define DATA_TABLES(table) (bp->master_data_tbl->ListOfDataTables.table)
107 return &bp->base; in bios_parser_create()
116 kfree(bp->base.bios_local_image); in bios_parser_destruct()
117 kfree(bp->base.integrated_info); in bios_parser_destruct()
139 uint32_t object_table_offset = bp->object_info_tbl_offset + offset; in get_number_of_objects()
146 return table->ucNumberOfObjects; in get_number_of_objects()
154 le16_to_cpu(bp->object_info_tbl.v1_1->usConnectorObjectTableOffset)); in bios_parser_get_connectors_number()
[all …]
/linux-5.10/arch/x86/kernel/
Dtsc_msr.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
62 * Penwell and Clovertrail use spread spectrum clock,
161 * MSR-based CPU/TSC frequency discovery for certain CPUs.
179 freq_desc = (struct freq_desc *)id->driver_data; in cpu_khz_from_msr()
180 if (freq_desc->use_msr_plat) { in cpu_khz_from_msr()
190 index = lo & freq_desc->mask; in cpu_khz_from_msr()
191 md = &freq_desc->muldiv[index]; in cpu_khz_from_msr()
197 if (md->divider) { in cpu_khz_from_msr()
198 tscref = TSC_REFERENCE_KHZ * md->multiplier; in cpu_khz_from_msr()
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