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/linux-5.10/Documentation/devicetree/bindings/mux/
Dmux-controller.txt4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
10 A mux controller provides a number of states to its consumers, and the state
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
18 Mux controller consumers should specify a list of mux controllers that they
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
[all …]
Dreg-mux.txt1 Generic register bitfield-based multiplexer controller bindings
7 - compatible : should be one of
8 "reg-mux" : if parent device of mux controller is not syscon device
9 "mmio-mux" : if parent device of mux controller is syscon device
10 - #mux-control-cells : <1>
11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
12 pairs, each describing a single mux control.
13 * Standard mux-controller bindings as decribed in mux-controller.txt
16 - idle-states : if present, the state the muxes will have when idle. The
21 pair in the mux-reg-masks array.
[all …]
Dgpio-mux.txt1 GPIO-based multiplexer controller bindings
7 - compatible : "gpio-mux"
8 - mux-gpios : list of gpios used to control the multiplexer, least
10 - #mux-control-cells : <0>
11 * Standard mux-controller bindings as decribed in mux-controller.txt
14 - idle-state : if present, the state the mux will have when idle. The
23 mux: mux-controller {
24 compatible = "gpio-mux";
25 #mux-control-cells = <0>;
27 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
[all …]
Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.txt
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
Dadi,adgs1408.txt1 Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux
4 - compatible : Should be one of
7 * Standard mux-controller bindings as described in mux-controller.txt
10 - gpio-controller : if present, #gpio-cells is required.
11 - #gpio-cells : should be <2>
12 - First cell is the GPO line number, i.e. 0 to 3
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, the state that the mux controller will have
28 * One mux controller.
29 * Mux state set to idle as is (no idle-state declared)
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio-mux-multiplexer.txt3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
4 of a mux producer device. The mux producer can be of any type like mmio mux
5 producer, gpio mux producer or generic register based mux producer.
9 - compatible : should be "mmio-mux-multiplexer"
10 - mux-controls : mux controller node to use for operating the mux
11 - mdio-parent-bus : phandle to the parent MDIO bus.
17 Documentation/devicetree/bindings/mux/mux-controller.txt
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
21 In below example the Mux producer and consumer are separate nodes.
25 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
[all …]
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
5 node must be a child of the memory-mapped device. The driver currently only
6 supports devices with 8, 16 or 32-bit registers.
10 - compatible : string, must contain "mdio-mux-mmioreg"
12 - reg : integer, contains the offset of the register that controls the bus
16 - mux-mask : integer, contains an eight-bit mask that specifies which
18 'reg' property of each child mdio-mux node must be constrained by
23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
[all …]
/linux-5.10/Documentation/devicetree/bindings/mtd/
Dti,am654-hbmc.txt4 - compatible : "ti,am654-hbmc" for AM654 SoC
5 - reg : Two entries:
9 - ranges : Address translation from offset within CS to allocated MMIO
13 - mux-controls : phandle to the multiplexer that controls selection of
16 See Documentation/devicetree/bindings/mux/reg-mux.txt
17 for mmio-mux binding details
21 system-controller@47000000 {
22 compatible = "syscon", "simple-mfd";
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
/linux-5.10/arch/arm/boot/dts/
Dat91-natte.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller { label
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/multiplexer/
Dio-channel-mux.txt7 - compatible : "io-channel-mux"
8 - io-channels : Channel node of the parent channel that has multiplexed
10 - io-channel-names : Should be "parent".
11 - #address-cells = <1>;
12 - #size-cells = <0>;
13 - mux-controls : Mux controller node to use for operating the mux
14 - channels : List of strings, labeling the mux controller states.
16 For each non-empty string in the channels property, an io-channel will
17 be created. The number of this io-channel is the same as the index into
18 the list of strings in the channels property, and also matches the mux
[all …]
/linux-5.10/Documentation/devicetree/bindings/media/
Dvideo-mux.txt7 the bindings in Documentation/devicetree/bindings/mux/mux-controller.txt
10 - compatible : should be "video-mux"
11 - mux-controls : mux controller node to use for operating the mux
12 - #address-cells: should be <1>
13 - #size-cells: should be <0>
14 - port@*: at least three port nodes containing endpoints connecting to the
18 Optionally, #address-cells, #size-cells, and port nodes can be grouped under a
23 mux: mux-controller {
24 compatible = "gpio-mux";
25 #mux-control-cells = <0>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-mux.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 setting of the multiplexer to a channel needs to be done by a specific SPI mux
16 MOSI /--------------------------------+--------+--------+--------\
17 MISO |/------------------------------+|-------+|-------+|-------\|
18 SCL ||/----------------------------+||------+||------+||------\||
20 +------------+ ||| ||| ||| |||
21 | SoC ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+
[all …]
Dsnps,dw-apb-ssi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: "spi-controller.yaml#"
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra20-pinmux.txt4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
15 mux function to select on those pin(s)/group(s), and various pin configuration
16 parameters, such as pull-up, tristate, drive strength, etc.
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function or tristate parameter. For this
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
[all …]
Dnvidia,tegra210-pinmux.txt4 - compatible: "nvidia,tegra210-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
16 mux function to select on those pin(s)/group(s), and various pin configuration
17 parameters, such as pull-up, tristate, drive strength, etc.
23 other words, a subnode that lists a mux function but no pin configuration
26 information about e.g. the mux function or tristate parameter. For this
33 include/dt-binding/pinctrl/pinctrl-tegra.h.
[all …]
Dnvidia,tegra194-pinmux.txt4 - compatible: "nvidia,tegra194-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
16 mux function to select on those pin(s)/group(s), and various pin configuration
17 parameters, such as pull-up, tristate, drive strength, etc.
21 include/dt-binding/pinctrl/pinctrl-tegra.h.
23 Required subnode-properties:
24 - nvidia,pins : An array of strings. Each string contains the name of a pin or
[all …]
/linux-5.10/include/dt-bindings/clock/
Dtegra186-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
384 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */
386 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */
388 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN */
392 /** @clkdesc{spi_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_SPI3} */
394 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1} */
396 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5} */
398 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 */
400 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP */
402 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI */
[all …]
/linux-5.10/Documentation/admin-guide/media/
Dimx7.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
34 --------
[all …]
/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-mux-gpmux.txt1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
[all …]
/linux-5.10/arch/arm64/boot/dts/microchip/
Dsparx5_pcb125.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "microchip,sparx5-pcb125", "microchip,sparx5";
20 emmc_pins: emmc-pins {
28 drive-strength = <3>;
35 bus-width = <8>;
36 non-removable;
37 pinctrl-0 = <&emmc_pins>;
38 max-frequency = <8000000>;
39 microchip,clock-delay = <10>;
[all …]
Dsparx5_pcb135_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
18 gpio-restart {
19 compatible = "gpio-restart";
26 i2cmux_pins_i: i2cmux-pins-i {
30 output-low;
32 i2cmux_s29: i2cmux-0 {
35 output-high;
37 i2cmux_s30: i2cmux-1 {
40 output-high;
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
[all …]
/linux-5.10/sound/soc/codecs/
Dwm8770.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8770.c -- WM8770 ALSA SoC Audio driver
105 regcache_mark_dirty(wm8770->regmap); \
114 static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
115 static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
116 static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
133 /* global DAC playback controls */
139 /* global VOUT playback controls */
144 /* VOUT1/2/3/4 specific controls */
162 /* DAC1/2/3/4 specific controls */
[all …]
Dda7213.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 /* -54dB */
34 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
35 /* -52.5dB to 15dB */
36 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
41 /* -78dB to 12dB */
42 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
51 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
52 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
53 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
[all …]

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