Home
last modified time | relevance | path

Searched full:mu (Results 1 – 25 of 105) sorted by relevance

12345

/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dfsl,mu.yaml4 $id: http://devicetree.org/schemas/mailbox/fsl,mu.yaml#
7 title: NXP i.MX Messaging Unit (MU)
15 and control) through the MU interface. The MU also provides the ability
18 Because the MU manages the messaging between processors, the MU uses
20 Therefore, the MU must synchronize the accesses from one side to the
21 other. The MU accomplishes synchronization using two sets of matching
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8-mu-scu
32 - fsl,imx7s-mu
[all …]
/linux-5.10/kernel/bpf/
Dtnum.c64 u64 sm, sv, sigma, chi, mu; in tnum_add() local
70 mu = chi | a.mask | b.mask; in tnum_add()
71 return TNUM(sv & ~mu, mu); in tnum_add()
76 u64 dv, alpha, beta, chi, mu; in tnum_sub() local
82 mu = chi | a.mask | b.mask; in tnum_sub()
83 return TNUM(dv & ~mu, mu); in tnum_sub()
98 u64 v, mu; in tnum_or() local
101 mu = a.mask | b.mask; in tnum_or()
102 return TNUM(v, mu & ~v); in tnum_or()
107 u64 v, mu; in tnum_xor() local
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/freescale/
Dfsl,scu.txt9 The AP communicates with the SC using a multi-ported MU module found
10 in the LSIO subsystem. The current definition of this MU module provides
12 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
13 with the LSIO DSC IP bus. The SC firmware will communicate with this MU
26 include "gip3" if want to support general MU interrupt.
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
28 rx, and 1 optional MU channel for general interrupt.
29 All MU channels must be in the same MU instance.
30 Cross instances are not allowed. The MU instance can only
50 See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
[all …]
/linux-5.10/drivers/scsi/
Dhptiop.c142 static u64 mv_outbound_read(struct hpt_iopmu_mv __iomem *mu) in mv_outbound_read() argument
144 u32 outbound_tail = readl(&mu->outbound_tail); in mv_outbound_read()
145 u32 outbound_head = readl(&mu->outbound_head); in mv_outbound_read()
150 memcpy_fromio(&p, &mu->outbound_q[mu->outbound_tail], 8); in mv_outbound_read()
155 writel(outbound_tail, &mu->outbound_tail); in mv_outbound_read()
163 u32 inbound_head = readl(&hba->u.mv.mu->inbound_head); in mv_inbound_write()
169 memcpy_toio(&hba->u.mv.mu->inbound_q[inbound_head], &p, 8); in mv_inbound_write()
170 writel(head, &hba->u.mv.mu->inbound_head); in mv_inbound_write()
213 msg = readl(&hba->u.mv.mu->outbound_msg); in iop_intr_mv()
222 while ((tag = mv_outbound_read(hba->u.mv.mu))) in iop_intr_mv()
[all …]
Dhptiop.h278 struct hpt_iopmu_mv __iomem *mu; member
284 struct hpt_iopmu_mvfrey __iomem *mu; member
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8qxp.dtsi547 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
555 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
562 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
570 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
578 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
586 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
/linux-5.10/drivers/input/
Dinput-mt.c315 static int adjust_dual(int *begin, int step, int *end, int eq, int mu) in adjust_dual() argument
336 if (c == 0 || (c > mu && (!eq || mu > 0))) in adjust_dual()
339 if (s < 0 && mu <= 0) in adjust_dual()
348 static void find_reduced_matrix(int *w, int nr, int nc, int nrc, int mu) in find_reduced_matrix() argument
354 adjust_dual(w + i, nr, w + i + nrc, nr <= nc, mu); in find_reduced_matrix()
357 sum += adjust_dual(w + i, 1, w + i + nr, nc <= nr, mu); in find_reduced_matrix()
365 int mu) in input_mt_set_matrix() argument
379 *w++ = dx * dx + dy * dy - mu; in input_mt_set_matrix()
445 int mu = 2 * dmax * dmax; in input_mt_assign_slots() local
455 nrc = input_mt_set_matrix(mt, pos, num_pos, mu); in input_mt_assign_slots()
[all …]
/linux-5.10/drivers/mtd/nand/raw/atmel/
Dpmecc.c176 s32 *mu; member
361 /* Reserve space for mu, dmu and delta. */ in atmel_pmecc_create_user()
375 user->mu = (s32 *)PTR_ALIGN(user->smu + in atmel_pmecc_create_user()
379 user->dmu = user->mu + req->ecc.strength + 1; in atmel_pmecc_create_user()
491 s32 *mu = user->mu; in atmel_pmecc_get_sigma() local
513 /* Mu */ in atmel_pmecc_get_sigma()
514 mu[0] = -1; in atmel_pmecc_get_sigma()
523 delta[0] = (mu[0] * 2 - lmu[0]) >> 1; in atmel_pmecc_get_sigma()
527 /* Mu */ in atmel_pmecc_get_sigma()
528 mu[1] = 0; in atmel_pmecc_get_sigma()
[all …]
/linux-5.10/drivers/net/wireless/ath/ath11k/
Ddebugfs_htt_stats.h496 /* MU MIMO stats per hwQ */
614 u32 delayed_bar_1; /* MU user 1 */
615 u32 delayed_bar_2; /* MU user 2 */
616 u32 delayed_bar_3; /* MU user 3 */
617 u32 delayed_bar_4; /* MU user 4 */
618 u32 delayed_bar_5; /* MU user 5 */
619 u32 delayed_bar_6; /* MU user 6 */
620 u32 delayed_bar_7; /* MU user 7 */
629 u32 ac_mu_mimo_brpoll_1; /* MU user 1 */
630 u32 ac_mu_mimo_brpoll_2; /* MU user 2 */
[all …]
/linux-5.10/drivers/net/wireless/realtek/rtw88/
Dbf.c63 rtw_dbg(rtwdev, RTW_DBG_BF, "mu bfer number over limit\n"); in rtw_bf_assoc()
239 rtw_dbg(rtwdev, RTW_DBG_BF, "config as an mu bfee\n"); in rtw_bf_enable_bfee_mu()
318 rtw_dbg(rtwdev, RTW_DBG_BF, "this vif is not mu bfee\n"); in rtw_bf_set_gid_table()
350 /* MU Retry Limit */ in rtw_bf_phy_init()
353 /* Disable Tx MU-MIMO until sounding done */ in rtw_bf_phy_init()
355 /* Clear validity of MU STAs */ in rtw_bf_phy_init()
359 /* MU-MIMO Option as default value */ in rtw_bf_phy_init()
364 /* MU-MIMO Control as default value */ in rtw_bf_phy_init()
366 /* Set MU NDPA rate & BW source */ in rtw_bf_phy_init()
/linux-5.10/sound/usb/
Dmixer_maps.c41 USB_IN[1] --->FU[2]------------------------------+->MU[16]-->PU[17]-+->FU[18]--+->EU[27]--+->EU[21]…
43 USB_IN[3] -+->SU[5]-->FU[6]--+->MU[14] ->PU[15]->+ | | | …
70 /* 14: MU (w/o controls) */
72 /* 16: MU (w/o controls) */
123 /* 15: MU */
135 Dig_IN[4]---+->FU[6]-->MU[16]->FU[18]-+->EU[21]->SU[31]----->FU[30]->Hph_OUT[20]
154 /* 16: MU w/o controls */
225 /* 6: MU */
230 /* 11: MU */
253 /* 0xb: MU (w/o controls) */
[all …]
/linux-5.10/drivers/mailbox/
Dimx-mailbox.c306 /* IPC MU should be with IRQF_NO_SUSPEND set */ in imx_mu_startup()
446 /* Set default MU configuration */ in imx_mu_init_generic()
468 /* Set default MU configuration */ in imx_mu_init_scu()
513 priv->side_b = of_property_read_bool(np, "fsl,mu-side-b"); in imx_mu_probe()
594 { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp },
595 { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
596 { .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu },
616 * ONLY restore MU when context lost, the TIE could in imx_mu_resume_noirq()
617 * be set during noirq resume as there is MU data in imx_mu_resume_noirq()
619 * value will overwrite the TIE and cause MU data in imx_mu_resume_noirq()
/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/
Dmac.h424 * Per each trigger-based AC, (set by MU EDCA Parameter set info-element)
426 * The MU-TIMER is reloaded w/ MU_TIME each time a frame from the AC is sent via
432 * allowed till the MU-TIMER is 0
433 * @mu_time: MU time in 8TU units
507 * @STA_CTXT_HE_MU_EDCA_CW: indicates that there is an element of MU EDCA
529 * @IWL_HE_HTC_UL_MU_RESP_SCHED: HE UL MU response schedule
576 * @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues
610 /* The below fields are set via MU EDCA parameter set element */
636 * @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues
678 /* The below fields are set via MU EDCA parameter set element */
[all …]
Ddatapath.h140 * struct iwl_mu_group_mgmt_cmd - VHT MU-MIMO group configuration
143 * @membership_status: a bitmap of MU groups
154 * struct iwl_mu_group_mgmt_notif - VHT MU-MIMO group id notification
156 * @membership_status: a bitmap of MU groups
Dstats.h846 * @rx_sigb_invalid_cnt: rx (suspected) HE-MU w/ bad SIG-B
850 * received HE-MU frames w/ good Sig-B
853 * received HE-MU frames for us (w/ our AID)
856 * @rx_mu_ru_bw_ar: MU alloc, MHz: 0 - 2, 1 - 5, 2 - 10, 3 - 20,
881 * EDCA <--> MU-EDCA transitions
Drx.h385 /* info type: HE MU/MU-EXT */
402 /* info type: HE MU-EXT */
418 /* info type: HE MU-EXT */
427 /* info type: HE MU-EXT */
/linux-5.10/drivers/firmware/imx/
Dimx-scu-irq.c5 * Implementation of the SCU IRQ functions using MU.
164 i = of_alias_get_id(spec.np, "mu"); in imx_scu_enable_general_irq_channel()
166 /* use mu1 as general mu irq channel if failed */ in imx_scu_enable_general_irq_channel()
Dimx-scu.c151 dev_dbg(sc_ipc->dev, "mu %u msg %u 0x%x\n", sc_chan->idx, in imx_scu_rx_callback()
180 * sequentially but linux MU driver implements multiple in imx_scu_ipc_write()
281 sc_ipc->fast_ipc = of_device_is_compatible(args.np, "fsl,imx8-mu-scu"); in imx_scu_probe()
/linux-5.10/net/mac80211/
Ddebugfs_sta.c580 PFLAG(MU_BEAMFORMER_CAPABLE, "MU-BEAMFORMER-CAPABLE"); in sta_vht_capa_read()
581 PFLAG(MU_BEAMFORMEE_CAPABLE, "MU-BEAMFORMEE-CAPABLE"); in sta_vht_capa_read()
706 PFLAG(MAC, 2, MU_CASCADING, "MU-CASCADING"); in sta_he_capa_read()
744 PFLAG(MAC, 5, OM_CTRL_UL_MU_DATA_DIS_RX, "OM-CTRL-UL-MU-DATA-DIS-RX"); in sta_he_capa_read()
796 PFLAG(PHY, 2, UL_MU_FULL_MU_MIMO, "UL-MU-FULL-MU-MIMO"); in sta_he_capa_read()
797 PFLAG(PHY, 2, UL_MU_PARTIAL_MU_MIMO, "UL-MU-PARTIAL-MU-MIMO"); in sta_he_capa_read()
835 "RX-HE-MU-PPDU-FROM-NON-AP-STA"); in sta_he_capa_read()
839 PFLAG(PHY, 4, MU_BEAMFORMER, "MU-BEAMFORMER"); in sta_he_capa_read()
851 PFLAG(PHY, 5, NG16_MU_FEEDBACK, "NG16-MU-FEEDBACK"); in sta_he_capa_read()
854 PFLAG(PHY, 6, CODEBOOK_SIZE_75_MU, "CODEBOOK-SIZE-75-MU"); in sta_he_capa_read()
[all …]
/linux-5.10/drivers/tee/optee/
Drpc.c24 mutex_init(&priv->mu); in optee_wait_queue_init()
30 mutex_destroy(&priv->mu); in optee_wait_queue_exit()
148 mutex_lock(&wq->mu); in wq_entry_get()
161 mutex_unlock(&wq->mu); in wq_entry_get()
171 mutex_lock(&wq->mu); in wq_sleep()
173 mutex_unlock(&wq->mu); in wq_sleep()
/linux-5.10/drivers/isdn/mISDN/
Ddsp_audio.c90 short mu, e, f, y; in ulaw2linear() local
93 mu = 255 - ulaw; in ulaw2linear()
94 e = (mu & 0x70) / 16; in ulaw2linear()
95 f = mu & 0x0f; in ulaw2linear()
98 if (mu & 0x80) in ulaw2linear()
/linux-5.10/lib/
Dlocking-selftest-mutex.h6 #define UNLOCK MU
/linux-5.10/drivers/net/ethernet/netronome/nfp/nfpcore/
Dnfp_mutex.c119 * MU Atomic Engine's CmpAndSwap32 command are supported.
166 * nfp_cpp_mutex_lock() - Lock a mutex handle, using the NFP MU Atomic Engine
212 * nfp_cpp_mutex_unlock() - Unlock a mutex handle, using the MU Atomic Engine
/linux-5.10/sound/core/oss/
Dmulaw.c2 * Mu-Law conversion Plug-In Interface
138 * Basic Mu-Law plugin
335 err = snd_pcm_plugin_build(plug, "Mu-Law<->linear conversion", in snd_pcm_plugin_build_mulaw()
/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7615/
DKconfig16 MU-MIMO up to 4 users/group and 160MHz channels.

12345