Searched +full:mtd +full:- +full:ram (Results 1 – 3 of 3) sorted by relevance
| /qemu/docs/system/arm/ |
| H A D | aspeed.rst | 1 …-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz).
10 The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
15 - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
16 - ``quanta-q71l-bmc`` OpenBMC Quanta BMC
17 - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
18 - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
22 - ``ast2500-evb`` Aspeed AST2500 Evaluation board
23 - ``romulus-bmc`` OpenPOWER Romulus POWER9 BMC
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| /qemu/docs/system/riscv/ |
| H A D | sifive_u.rst | 4 SiFive HiFive Unleashed Development Board is the ultimate RISC-V development
5 board featuring the Freedom U540 multi-core RISC-V processor.
8 -----------------
15 * Platform-Level Interrupt Controller (PLIC)
17 * L2 Loosely Integrated Memory (L2-LIM)
22 * 1 One-Time Programmable (OTP) memory with stored serial number
30 1 E51 core and 4 U54 core combination and the RISC-V core boots in 64-bit mode.
32 is also possible to create a 32-bit variant with the same peripherals except
33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help
34 testing of 32-bit guest software.
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| /qemu/ |
| H A D | qemu-options.hx | 14 "-h or -help display this help and exit\n", QEMU_ARCH_ALL)
16 ``-h``
21 "-version display version information and exit\n", QEMU_ARCH_ALL)
23 ``-version``
28 "-machine [type=]name[,prop[=value][,...]]\n"
29 " selects emulated machine ('-machine help' for list)\n"
33 " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"
34 " mem-merge=on|off controls memory merge support (default: on)\n"
35 " aes-key-wrap=on|off controls support for AES key wrapping (default=on)\n"
36 " dea-key-wrap=on|off controls support for DEA key wrapping (default=on)\n"
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