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Searched +full:mt8365 +full:- +full:power (Results 1 – 16 of 16) sorted by relevance

/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt8365.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mediatek,mt8365-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mediatek,mt8365-power.h>
15 compatible = "mediatek,mt8365";
16 interrupt-parent = <&sysirq>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux-6.8/Documentation/devicetree/bindings/power/
Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Power Domains Controller
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
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/linux-6.8/Documentation/devicetree/bindings/iommu/
Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
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/linux-6.8/Documentation/devicetree/bindings/memory-controllers/
Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt6795-smi-common
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Dmediatek,smi-larb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
19 - enum:
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
23 - mediatek,mt6795-smi-larb
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/linux-6.8/drivers/pmdomain/mediatek/
Dmt8365-pm-domains.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 #include "mtk-pm-domains.h"
7 #include <dt-bindings/power/mediatek,mt8365-power.h>
10 * MT8365 power domain support
Dmtk-pm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
19 #include "mt6795-pm-domains.h"
20 #include "mt8167-pm-domains.h"
21 #include "mt8173-pm-domains.h"
22 #include "mt8183-pm-domains.h"
23 #include "mt8186-pm-domains.h"
24 #include "mt8188-pm-domains.h"
25 #include "mt8192-pm-domains.h"
26 #include "mt8195-pm-domains.h"
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/linux-6.8/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mmsys.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
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/linux-6.8/Documentation/devicetree/bindings/soc/mediatek/
Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt6795-disp-mutex
30 - mediatek,mt8167-disp-mutex
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/linux-6.8/Documentation/devicetree/bindings/i2c/
Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
24 - const: mediatek,mt6589-i2c
25 - const: mediatek,mt7622-i2c
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/linux-6.8/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
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/linux-6.8/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy(@[0-9a-f]+)?$"
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/linux-6.8/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
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/linux-6.8/drivers/cpufreq/
Dmediatek-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
30 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
33 * 100mV < Vsram - Vproc < 200mV
71 if (cpumask_test_cpu(cpu, &info->cpus)) in mtk_cpu_dvfs_info_lookup()
81 const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; in mtk_cpufreq_voltage_tracking()
82 struct regulator *proc_reg = info->proc_reg; in mtk_cpufreq_voltage_tracking()
83 struct regulator *sram_reg = info->sram_reg; in mtk_cpufreq_voltage_tracking()
85 int retry = info->vtrack_max; in mtk_cpufreq_voltage_tracking()
89 dev_err(info->cpu_dev, in mtk_cpufreq_voltage_tracking()
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/linux-6.8/drivers/iommu/
Dmtk_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
6 #include <linux/arm-smccc.h>
17 #include <linux/io-pgtable.h>
35 #include <dt-bindings/memory/mtk-memory-port.h>
151 ((((pdata)->flags) & (mask)) == (_x))
207 * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the
209 * 0x40000000-0x44000000.
271 * In the sharing pgtable case, list data->list to the global list like m4ulist.
272 * In the non-sharing pgtable case, list data->list to the itself hw_list_head.
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