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/linux-6.8/Documentation/devicetree/bindings/soc/qcom/
Dqcom,spm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
20 - enum:
21 - qcom,sdm660-gold-saw2-v4.1-l2
22 - qcom,sdm660-silver-saw2-v4.1-l2
23 - qcom,msm8998-gold-saw2-v4.1-l2
24 - qcom,msm8998-silver-saw2-v4.1-l2
[all …]
/linux-6.8/Documentation/devicetree/bindings/arm/msm/
Dqcom,saw2.txt1 SPM AVS Wrapper 2 (SAW2)
3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
5 power-controller that transitions a piece of hardware (like a processor or
11 SAW2 revisions differ in the register offset and configuration data. Also, the
21 - compatible:
25 "qcom,saw2"
27 "qcom,apq8064-saw2-v1.1-cpu"
28 "qcom,msm8226-saw2-v2.1-cpu"
29 "qcom,msm8974-saw2-v2.1-cpu"
30 "qcom,apq8084-saw2-v2.1-cpu"
[all …]
/linux-6.8/arch/arm/boot/dts/qcom/
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
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/linux-6.8/drivers/soc/qcom/
Dspm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
195 if (drv->reg_data->reg_offset[reg]) in spm_register_write()
196 writel_relaxed(val, drv->reg_base + in spm_register_write()
197 drv->reg_data->reg_offset[reg]); in spm_register_write()
206 if (!drv->reg_data->reg_offset[reg]) in spm_register_write_sync()
210 writel_relaxed(val, drv->reg_base + in spm_register_write_sync()
211 drv->reg_data->reg_offset[reg]); in spm_register_write_sync()
212 ret = readl_relaxed(drv->reg_base + in spm_register_write_sync()
213 drv->reg_data->reg_offset[reg]); in spm_register_write_sync()
[all …]