/linux-5.10/drivers/gpu/drm/nouveau/nvif/ |
D | mmu.c | 22 #include <nvif/mmu.h> 28 nvif_mmu_dtor(struct nvif_mmu *mmu) in nvif_mmu_dtor() argument 30 kfree(mmu->kind); in nvif_mmu_dtor() 31 kfree(mmu->type); in nvif_mmu_dtor() 32 kfree(mmu->heap); in nvif_mmu_dtor() 33 nvif_object_dtor(&mmu->object); in nvif_mmu_dtor() 38 struct nvif_mmu *mmu) in nvif_mmu_ctor() argument 41 { NVIF_CLASS_MEM_GF100, -1 }, in nvif_mmu_ctor() 42 { NVIF_CLASS_MEM_NV50 , -1 }, in nvif_mmu_ctor() 43 { NVIF_CLASS_MEM_NV04 , -1 }, in nvif_mmu_ctor() [all …]
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D | mem.c | 28 nvif_mem_ctor_map(struct nvif_mmu *mmu, const char *name, u8 type, u64 size, in nvif_mem_ctor_map() argument 31 int ret = nvif_mem_ctor(mmu, name, mmu->mem, NVIF_MEM_MAPPABLE | type, in nvif_mem_ctor_map() 34 ret = nvif_object_map(&mem->object, NULL, 0); in nvif_mem_ctor_map() 44 nvif_object_dtor(&mem->object); in nvif_mem_dtor() 48 nvif_mem_ctor_type(struct nvif_mmu *mmu, const char *name, s32 oclass, in nvif_mem_ctor_type() argument 49 int type, u8 page, u64 size, void *argv, u32 argc, in nvif_mem_ctor_type() argument 56 mem->object.client = NULL; in nvif_mem_ctor_type() 57 if (type < 0) in nvif_mem_ctor_type() 58 return -EINVAL; in nvif_mem_ctor_type() 62 return -ENOMEM; in nvif_mem_ctor_type() [all …]
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/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
D | base.c | 42 nvkm_mmu_ptp_put(struct nvkm_mmu *mmu, bool force, struct nvkm_mmu_pt *pt) in nvkm_mmu_ptp_put() argument 44 const int slot = pt->base >> pt->ptp->shift; in nvkm_mmu_ptp_put() 45 struct nvkm_mmu_ptp *ptp = pt->ptp; in nvkm_mmu_ptp_put() 50 if (!ptp->free) in nvkm_mmu_ptp_put() 51 list_add(&ptp->head, &mmu->ptp.list); in nvkm_mmu_ptp_put() 52 ptp->free |= BIT(slot); in nvkm_mmu_ptp_put() 54 /* If there's no more sub-allocations, destroy PTP. */ in nvkm_mmu_ptp_put() 55 if (ptp->free == ptp->mask) { in nvkm_mmu_ptp_put() 56 nvkm_mmu_ptc_put(mmu, force, &ptp->pt); in nvkm_mmu_ptp_put() 57 list_del(&ptp->head); in nvkm_mmu_ptp_put() [all …]
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D | ummu.c | 35 struct nvkm_mmu *mmu = nvkm_ummu(object)->mmu; in nvkm_ummu_sclass() local 37 if (mmu->func->mem.user.oclass && oclass->client->super) { in nvkm_ummu_sclass() 38 if (index-- == 0) { in nvkm_ummu_sclass() 39 oclass->base = mmu->func->mem.user; in nvkm_ummu_sclass() 40 oclass->ctor = nvkm_umem_new; in nvkm_ummu_sclass() 45 if (mmu->func->vmm.user.oclass) { in nvkm_ummu_sclass() 46 if (index-- == 0) { in nvkm_ummu_sclass() 47 oclass->base = mmu->func->vmm.user; in nvkm_ummu_sclass() 48 oclass->ctor = nvkm_uvmm_new; in nvkm_ummu_sclass() 53 return -EINVAL; in nvkm_ummu_sclass() [all …]
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D | umem.c | 37 struct nvkm_client *master = client->object.client; in nvkm_umem_search() 44 if (client->super && client != master) { in nvkm_umem_search() 45 spin_lock(&master->lock); in nvkm_umem_search() 46 list_for_each_entry(umem, &master->umem, head) { in nvkm_umem_search() 47 if (umem->object.object == handle) { in nvkm_umem_search() 48 memory = nvkm_memory_ref(umem->memory); in nvkm_umem_search() 52 spin_unlock(&master->lock); in nvkm_umem_search() 56 if (!umem->priv || client->super) in nvkm_umem_search() 57 memory = nvkm_memory_ref(umem->memory); in nvkm_umem_search() 60 return memory ? memory : ERR_PTR(-ENOENT); in nvkm_umem_search() [all …]
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D | mem.c | 33 struct nvkm_mmu *mmu; member 45 return nvkm_mem(memory)->target; in nvkm_mem_target() 58 if (mem->pages == 1 && mem->mem) in nvkm_mem_addr() 59 return mem->dma[0]; in nvkm_mem_addr() 66 return nvkm_mem(memory)->pages << PAGE_SHIFT; in nvkm_mem_size() 75 .memory = &mem->memory, in nvkm_mem_map_dma() 77 .dma = mem->dma, in nvkm_mem_map_dma() 86 if (mem->mem) { in nvkm_mem_dtor() 87 while (mem->pages--) { in nvkm_mem_dtor() 88 dma_unmap_page(mem->mmu->subdev.device->dev, in nvkm_mem_dtor() [all …]
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D | memnv04.c | 31 nv04_mem_map(struct nvkm_mmu *mmu, struct nvkm_memory *memory, void *argv, in nv04_mem_map() argument 37 struct nvkm_device *device = mmu->subdev.device; in nv04_mem_map() 39 int ret = -ENOSYS; in nv04_mem_map() 41 if ((ret = nvif_unvers(ret, &argv, &argc, args->vn))) in nv04_mem_map() 44 *paddr = device->func->resource_addr(device, 1) + addr; in nv04_mem_map() 46 *pvma = ERR_PTR(-ENODEV); in nv04_mem_map() 51 nv04_mem_new(struct nvkm_mmu *mmu, int type, u8 page, u64 size, in nv04_mem_new() argument 57 int ret = -ENOSYS; in nv04_mem_new() 59 if ((ret = nvif_unvers(ret, &argv, &argc, args->vn))) in nv04_mem_new() 62 if (mmu->type[type].type & NVKM_MEM_MAPPABLE) in nv04_mem_new() [all …]
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D | vmmgp100.c | 37 struct device *dev = vmm->mmu->subdev.device->dev; in gp100_vmm_pfn_unmap() 40 nvkm_kmap(pt->memory); in gp100_vmm_pfn_unmap() 41 while (ptes--) { in gp100_vmm_pfn_unmap() 42 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 0); in gp100_vmm_pfn_unmap() 43 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 4); in gp100_vmm_pfn_unmap() 51 nvkm_done(pt->memory); in gp100_vmm_pfn_unmap() 59 nvkm_kmap(pt->memory); in gp100_vmm_pfn_clear() 60 while (ptes--) { in gp100_vmm_pfn_clear() 61 u32 datalo = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 0); in gp100_vmm_pfn_clear() 62 u32 datahi = nvkm_ro32(pt->memory, pt->base + ptei * 8 + 4); in gp100_vmm_pfn_clear() [all …]
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D | vmmgf100.c | 35 u64 base = (addr >> 8) | map->type; in gf100_vmm_pgt_pte() 38 if (map->ctag && !(map->next & (1ULL << 44))) { in gf100_vmm_pgt_pte() 39 while (ptes--) { in gf100_vmm_pgt_pte() 40 data = base | ((map->ctag >> 1) << 44); in gf100_vmm_pgt_pte() 41 if (!(map->ctag++ & 1)) in gf100_vmm_pgt_pte() 45 base += map->next; in gf100_vmm_pgt_pte() 48 map->type += ptes * map->ctag; in gf100_vmm_pgt_pte() 50 while (ptes--) { in gf100_vmm_pgt_pte() 52 data += map->next; in gf100_vmm_pgt_pte() 68 if (map->page->shift == PAGE_SHIFT) { in gf100_vmm_pgt_dma() [all …]
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D | memgf100.c | 34 gf100_mem_map(struct nvkm_mmu *mmu, struct nvkm_memory *memory, void *argv, in gf100_mem_map() argument 42 struct nvkm_device *device = mmu->subdev.device; in gf100_mem_map() 44 int ret = -ENOSYS; in gf100_mem_map() 46 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in gf100_mem_map() 47 uvmm.ro = args->v0.ro; in gf100_mem_map() 48 uvmm.kind = args->v0.kind; in gf100_mem_map() 50 if (!(ret = nvif_unvers(ret, &argv, &argc, args->vn))) { in gf100_mem_map() 63 *paddr = device->func->resource_addr(device, 1) + (*pvma)->addr; in gf100_mem_map() 64 *psize = (*pvma)->size; in gf100_mem_map() 69 gf100_mem_new(struct nvkm_mmu *mmu, int type, u8 page, u64 size, in gf100_mem_new() argument [all …]
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D | vmmnv50.c | 35 u64 next = addr + map->type, data; in nv50_vmm_pgt_pte() 39 map->type += ptes * map->ctag; in nv50_vmm_pgt_pte() 42 for (log2blk = 7; log2blk >= 0; log2blk--) { in nv50_vmm_pgt_pte() 49 next += pten * map->next; in nv50_vmm_pgt_pte() 50 ptes -= pten; in nv50_vmm_pgt_pte() 52 while (pten--) in nv50_vmm_pgt_pte() 68 if (map->page->shift == PAGE_SHIFT) { in nv50_vmm_pgt_dma() 70 nvkm_kmap(pt->memory); in nv50_vmm_pgt_dma() 71 while (ptes--) { in nv50_vmm_pgt_dma() 72 const u64 data = *map->dma++ + map->type; in nv50_vmm_pgt_dma() [all …]
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/linux-5.10/drivers/gpu/drm/msm/ |
D | msm_mmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 13 void (*detach)(struct msm_mmu *mmu); 14 int (*map)(struct msm_mmu *mmu, uint64_t iova, struct sg_table *sgt, 16 int (*unmap)(struct msm_mmu *mmu, uint64_t iova, size_t len); 17 void (*destroy)(struct msm_mmu *mmu); 31 enum msm_mmu_type type; member 34 static inline void msm_mmu_init(struct msm_mmu *mmu, struct device *dev, in msm_mmu_init() argument 35 const struct msm_mmu_funcs *funcs, enum msm_mmu_type type) in msm_mmu_init() argument 37 mmu->dev = dev; in msm_mmu_init() 38 mmu->funcs = funcs; in msm_mmu_init() [all …]
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/linux-5.10/arch/x86/kernel/ |
D | paravirt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc 44 ".size _paravirt_nop, . - _paravirt_nop\n\t" 45 ".type _paravirt_nop, @function\n\t" 67 unsigned long delta = (unsigned long)target - (addr+call_len); in paravirt_patch_call() 75 b->opcode = 0xe8; /* call */ in paravirt_patch_call() 76 b->delta = delta; in paravirt_patch_call() 93 unsigned long delta = (unsigned long)target - (addr+5); in paravirt_patch_jmp() 102 b->opcode = 0xe9; /* jmp */ in paravirt_patch_jmp() 103 b->delta = delta; in paravirt_patch_jmp() [all …]
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/linux-5.10/drivers/gpu/drm/nouveau/include/nvif/ |
D | mmu.h | 27 u8 type; member 29 } *type; member 39 nvif_mmu_kind_valid(struct nvif_mmu *mmu, u8 kind) in nvif_mmu_kind_valid() argument 42 if (kind >= mmu->kind_nr || mmu->kind[kind] == mmu->kind_inv) in nvif_mmu_kind_valid() 49 nvif_mmu_type(struct nvif_mmu *mmu, u8 mask) in nvif_mmu_type() argument 52 for (i = 0; i < mmu->type_nr; i++) { in nvif_mmu_type() 53 if ((mmu->type[i].type & mask) == mask) in nvif_mmu_type() 56 return -EINVAL; in nvif_mmu_type()
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/linux-5.10/drivers/gpu/drm/nouveau/ |
D | nouveau_mem.c | 47 switch (vmm->object.oclass) { in nouveau_mem_map() 54 args.nv50.kind = mem->kind; in nouveau_mem_map() 55 args.nv50.comp = mem->comp; in nouveau_mem_map() 62 if (mem->mem.type & NVIF_MEM_VRAM) in nouveau_mem_map() 68 args.gf100.kind = mem->kind; in nouveau_mem_map() 73 return -ENOSYS; in nouveau_mem_map() 76 super = vmm->object.client->super; in nouveau_mem_map() 77 vmm->object.client->super = true; in nouveau_mem_map() 78 ret = nvif_vmm_map(vmm, vma->addr, mem->mem.size, &args, argc, in nouveau_mem_map() 79 &mem->mem, 0); in nouveau_mem_map() [all …]
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/linux-5.10/arch/m68k/ |
D | Kconfig.cpu | 1 # SPDX-License-Identifier: GPL-2.0 2 comment "Processor Type" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 13 applications, and are all System-On-Chip (SOC) devices, as opposed 39 depends on !MMU 50 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 51 a paging MMU. 61 System-On-Chip parts, and does not contain a paging MMU. 65 depends on MMU [all …]
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D | Kconfig.machine | 1 # SPDX-License-Identifier: GPL-2.0 8 depends on MMU 9 select MMU_MOTOROLA if MMU 17 depends on MMU 18 select MMU_MOTOROLA if MMU 21 This option enables support for the 68000-based Atari series of 28 depends on MMU 29 select MMU_MOTOROLA if MMU 41 depends on MMU 42 select MMU_MOTOROLA if MMU [all …]
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/linux-5.10/arch/riscv/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # see Documentation/kbuild/kconfig-language.rst. 19 select ARCH_HAS_DEBUG_VIRTUAL if MMU 28 select ARCH_HAS_STRICT_KERNEL_RWX if MMU 31 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 35 select CLINT_TIMER if !MMU 47 select GENERIC_PTDUMP if MMU 50 select GENERIC_STRNCPY_FROM_USER if MMU 51 select GENERIC_STRNLEN_USER if MMU 52 select GENERIC_TIME_VSYSCALL if MMU && 64BIT [all …]
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/linux-5.10/arch/m68k/include/asm/ |
D | sun3mmu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Definitions for Sun3 custom MMU. 10 #include <asm/sun3-head.h> 12 /* MMU characteristics. */ 19 #define SUN3_PMEG_MASK (SUN3_PMEG_SIZE - 1) 23 #define SUN3_PTE_MASK (SUN3_PTE_SIZE - 1) 32 #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */ 36 #define AC_SYNC_ERR 0x60000000 /* c fault type */ 38 #define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */ 44 #define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */ [all …]
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/linux-5.10/drivers/iommu/ |
D | ipmmu-vmsa.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * IOMMU API for Renesas VMSA-compatible IPMMU 6 * Copyright (C) 2014-2020 Renesas Electronics Corporation 11 #include <linux/dma-iommu.h> 12 #include <linux/dma-mapping.h> 18 #include <linux/io-pgtable.h> 30 #include <asm/dma-iommu.h> 33 #define arm_iommu_attach_device(...) -ENODEV 39 #define IPMMU_CTX_INVALID -1 74 struct ipmmu_vmsa_device *mmu; member [all …]
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/linux-5.10/drivers/gpu/drm/panfrost/ |
D | panfrost_mmu.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/dma-mapping.h> 10 #include <linux/io-pgtable.h> 23 #define mmu_write(dev, reg, data) writel(data, dev->iomem + reg) 24 #define mmu_read(dev, reg) readl(dev->iomem + reg) 31 /* Wait for the MMU status to indicate there is no active command, in in wait_ready() 33 ret = readl_relaxed_poll_timeout_atomic(pfdev->iomem + AS_STATUS(as_nr), in wait_ready() 37 dev_err(pfdev->dev, "AS_ACTIVE bit stuck\n"); in wait_ready() 46 /* write AS_COMMAND when MMU is ready to accept another command */ in write_cmd() 70 if ((size >> PAGE_SHIFT) != (1ul << (region_width - 11))) { in lock_region() [all …]
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/linux-5.10/arch/m68k/include/uapi/asm/ |
D | bootinfo.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 3 * asm/bootinfo.h -- Definition of the Linux/m68k boot information structure 57 #define BI_MACHTYPE 0x0001 /* machine type (__be32) */ 58 #define BI_CPUTYPE 0x0002 /* cpu type (__be32) */ 59 #define BI_FPUTYPE 0x0003 /* fpu type (__be32) */ 60 #define BI_MMUTYPE 0x0004 /* mmu type (__be32) */ 89 * CPU, FPU and MMU types (BI_CPUTYPE, BI_FPUTYPE, BI_MMUTYPE) 115 #define FPUB_SUNFPA 4 /* Sun-3 FPA */ 126 #define MMUB_68030 1 /* Internal MMU */ 127 #define MMUB_68040 2 /* Internal MMU */ [all …]
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/linux-5.10/arch/xtensa/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 5 select ARCH_HAS_BINFMT_FLAT if !MMU 6 select ARCH_HAS_DMA_PREP_COHERENT if MMU 7 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU 8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU 9 select ARCH_HAS_DMA_SET_UNCACHED if MMU 17 select DMA_REMAP if MMU 26 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL 33 select HAVE_FUTEX_CMPXCHG if !MMU 47 Xtensa processors are 32-bit RISC machines designed by Tensilica [all …]
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/linux-5.10/Documentation/xtensa/ |
D | booting.rst | 7 tag value constants. First entry in the list must have type BP_TAG_FIRST, last 8 entry must have type BP_TAG_LAST. The address of the first list entry is 9 passed to the kernel in the register a2. The address type depends on MMU type: 11 - For configurations without MMU, with region protection or with MPU the 13 - For configurations with region translarion MMU or with MMUv3 and CONFIG_MMU=n 16 - For configurations with MMUv2 the address must be a virtual address in the 18 - For configurations with MMUv3 and CONFIG_MMU=y the address may be either a
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/linux-5.10/arch/riscv/boot/dts/kendryte/ |
D | k210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/k210-clk.h> 10 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits 13 #address-cells = <1>; 14 #size-cells = <1>; 22 * The K210 has an sv39 MMU following the priviledge specification v1.9. 23 * Since this is a non-ratified draft specification, the kernel does not 24 * support it and the K210 support enabled only for the !MMU case. 25 * Be consistent with this by setting the CPUs MMU type to "none". 28 #address-cells = <1>; [all …]
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