| /linux-6.8/Documentation/devicetree/bindings/media/ |
| D | qcom,sdm660-camss.yaml | 228 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
233 clocks = <&mmcc CAMSS_AHB_CLK>,
234 <&mmcc CAMSS_CPHY_CSID0_CLK>,
235 <&mmcc CAMSS_CPHY_CSID1_CLK>,
236 <&mmcc CAMSS_CPHY_CSID2_CLK>,
237 <&mmcc CAMSS_CPHY_CSID3_CLK>,
238 <&mmcc CAMSS_CSI0_AHB_CLK>,
239 <&mmcc CAMSS_CSI0_CLK>,
240 <&mmcc CAMSS_CPHY_CSID0_CLK>,
241 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
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| D | qcom,msm8996-camss.yaml | 222 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
227 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
228 <&mmcc CAMSS_ISPIF_AHB_CLK>,
229 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
230 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
231 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
232 <&mmcc CAMSS_CSI0_AHB_CLK>,
233 <&mmcc CAMSS_CSI0_CLK>,
234 <&mmcc CAMSS_CSI0PHY_CLK>,
235 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
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| D | qcom,msm8996-venus.yaml | 108 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
114 clocks = <&mmcc VIDEO_CORE_CLK>,
115 <&mmcc VIDEO_AHB_CLK>,
116 <&mmcc VIDEO_AXI_CLK>,
117 <&mmcc VIDEO_MAXI_CLK>;
119 power-domains = <&mmcc VENUS_GDSC>;
144 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
146 power-domains = <&mmcc VENUS_CORE0_GDSC>;
151 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
153 power-domains = <&mmcc VENUS_CORE1_GDSC>;
|
| D | qcom,sdm660-venus.yaml | 108 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
114 clocks = <&mmcc VIDEO_CORE_CLK>,
115 <&mmcc VIDEO_AHB_CLK>,
116 <&mmcc VIDEO_AXI_CLK>,
117 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
144 power-domains = <&mmcc VENUS_GDSC>;
148 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
150 power-domains = <&mmcc VENUS_CORE0_GDSC>;
155 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
157 power-domains = <&mmcc VENUS_CORE0_GDSC>;
|
| /linux-6.8/Documentation/devicetree/bindings/clock/ |
| D | qcom,mmcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
25 - qcom,mmcc-msm8974
26 - qcom,mmcc-msm8992
27 - qcom,mmcc-msm8994
28 - qcom,mmcc-msm8996
[all …]
|
| /linux-6.8/Documentation/devicetree/bindings/display/msm/ |
| D | qcom,msm8998-mdss.yaml | 72 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
82 clocks = <&mmcc MDSS_AHB_CLK>,
83 <&mmcc MDSS_AXI_CLK>,
84 <&mmcc MDSS_MDP_CLK>;
95 power-domains = <&mmcc MDSS_GDSC>;
106 clocks = <&mmcc MDSS_AHB_CLK>,
107 <&mmcc MDSS_AXI_CLK>,
108 <&mmcc MNOC_AHB_CLK>,
109 <&mmcc MDSS_MDP_CLK>,
110 <&mmcc MDSS_VSYNC_CLK>;
[all …]
|
| D | mdp4.yaml | 88 <&mmcc 77>,
89 <&mmcc 86>,
90 <&mmcc 102>,
91 <&mmcc 75>,
92 <&mmcc 97>,
93 <&mmcc 12>;
|
| D | qcom,msm8998-dpu.yaml | 59 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
70 clocks = <&mmcc MDSS_AHB_CLK>,
71 <&mmcc MDSS_AXI_CLK>,
72 <&mmcc MNOC_AHB_CLK>,
73 <&mmcc MDSS_MDP_CLK>,
74 <&mmcc MDSS_VSYNC_CLK>;
|
| D | hdmi.yaml | 183 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
199 clocks = <&mmcc MDSS_MDP_CLK>,
200 <&mmcc MDSS_AHB_CLK>,
201 <&mmcc MDSS_HDMI_CLK>,
202 <&mmcc MDSS_HDMI_AHB_CLK>,
203 <&mmcc MDSS_EXTPCLK_CLK>;
|
| D | gpu.yaml | 225 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
237 clocks = <&mmcc OXILI_GFX3D_CLK>,
238 <&mmcc OXILICX_AHB_CLK>,
239 <&mmcc OXILICX_AXI_CLK>;
245 power-domains = <&mmcc OXILICX_GDSC>;
259 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
|
| /linux-6.8/arch/arm64/boot/dts/qcom/ |
| D | sdm630.dtsi | 9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
692 clocks = <&mmcc AHB_CLK_SRC>;
1488 mmcc: clock-controller@c8c0000 { label
1489 compatible = "qcom,mmcc-sdm630";
1522 power-domains = <&mmcc MDSS_GDSC>;
1524 clocks = <&mmcc MDSS_AHB_CLK>,
1525 <&mmcc MDSS_AXI_CLK>,
1526 <&mmcc MDSS_VSYNC_CLK>,
1527 <&mmcc MDSS_MDP_CLK>;
1551 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
[all …]
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| D | sdm660.dtsi | 171 assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
172 <&mmcc PCLK1_CLK_SRC>;
176 clocks = <&mmcc MDSS_MDP_CLK>,
177 <&mmcc MDSS_BYTE1_CLK>,
178 <&mmcc MDSS_BYTE1_INTF_CLK>,
179 <&mmcc MNOC_AHB_CLK>,
180 <&mmcc MDSS_AHB_CLK>,
181 <&mmcc MDSS_AXI_CLK>,
182 <&mmcc MISC_AHB_CLK>,
183 <&mmcc MDSS_PCLK1_CLK>,
[all …]
|
| D | msm8996.dtsi | 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
906 clocks = <&mmcc AHB_CLK_SRC>;
931 mmcc: clock-controller@8c0000 { label
932 compatible = "qcom,mmcc-msm8996";
953 assigned-clocks = <&mmcc MMPLL9_PLL>,
954 <&mmcc MMPLL1_PLL>,
955 <&mmcc MMPLL3_PLL>,
956 <&mmcc MMPLL4_PLL>,
957 <&mmcc MMPLL5_PLL>;
975 power-domains = <&mmcc MDSS_GDSC>;
[all …]
|
| D | msm8996pro-xiaomi-scorpio.dts | 36 clocks = <&mmcc MDSS_MDP_CLK>,
37 <&mmcc MMSS_MMAGIC_AHB_CLK>,
38 <&mmcc MDSS_AHB_CLK>,
39 <&mmcc MDSS_AXI_CLK>,
40 <&mmcc MMSS_MISC_AHB_CLK>,
41 <&mmcc MDSS_BYTE0_CLK>,
42 <&mmcc MDSS_PCLK0_CLK>,
43 <&mmcc MDSS_ESC0_CLK>,
44 <&mmcc SMMU_MDP_AHB_CLK>,
45 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
|
| D | msm8992-xiaomi-libra.dts | 50 clocks = <&mmcc MDSS_AHB_CLK>,
51 <&mmcc MDSS_AXI_CLK>,
52 <&mmcc MDSS_VSYNC_CLK>,
53 <&mmcc MDSS_MDP_CLK>,
54 <&mmcc MDSS_BYTE0_CLK>,
55 <&mmcc MDSS_PCLK0_CLK>,
56 <&mmcc MDSS_ESC0_CLK>;
57 power-domains = <&mmcc MDSS_GDSC>;
|
| D | msm8998-oneplus-common.dtsi | 39 clocks = <&mmcc MDSS_AHB_CLK>,
40 <&mmcc MDSS_AXI_CLK>,
41 <&mmcc MDSS_VSYNC_CLK>,
42 <&mmcc MDSS_MDP_CLK>,
43 <&mmcc MDSS_BYTE0_CLK>,
44 <&mmcc MDSS_BYTE0_INTF_CLK>,
45 <&mmcc MDSS_PCLK0_CLK>,
46 <&mmcc MDSS_ESC0_CLK>;
47 power-domains = <&mmcc MDSS_GDSC>;
|
| D | msm8998.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
2718 mmcc: clock-controller@c8c0000 { label
2719 compatible = "qcom,mmcc-msm8998";
2756 clocks = <&mmcc MDSS_AHB_CLK>,
2757 <&mmcc MDSS_AXI_CLK>,
2758 <&mmcc MDSS_MDP_CLK>;
2763 power-domains = <&mmcc MDSS_GDSC>;
2786 clocks = <&mmcc MDSS_AHB_CLK>,
2787 <&mmcc MDSS_AXI_CLK>,
2788 <&mmcc MNOC_AHB_CLK>,
[all …]
|
| D | msm8992.dtsi | 18 &mmcc {
19 compatible = "qcom,mmcc-msm8992";
|
| /linux-6.8/arch/arm/boot/dts/qcom/ |
| D | qcom-apq8064.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
712 mmcc: clock-controller@4000000 { label
713 compatible = "qcom,mmcc-apq8064";
992 <&mmcc GFX3D_CLK>,
993 <&mmcc GFX3D_AHB_CLK>,
994 <&mmcc GFX3D_AXI_CLK>,
995 <&mmcc MMSS_IMEM_AHB_CLK>;
1091 clocks = <&mmcc DSI_M_AHB_CLK>,
1092 <&mmcc DSI_S_AHB_CLK>,
1093 <&mmcc AMP_AHB_CLK>,
[all …]
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| D | qcom-msm8226.dtsi | 10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
360 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
361 <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
362 <&mmcc CAMSS_CCI_CCI_CLK>;
433 mmcc: clock-controller@fd8c0000 { label
434 compatible = "qcom,mmcc-msm8226";
888 power-domains = <&mmcc MDSS_GDSC>;
890 clocks = <&mmcc MDSS_AHB_CLK>,
891 <&mmcc MDSS_AXI_CLK>,
892 <&mmcc MDSS_VSYNC_CLK>;
[all …]
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| D | qcom-msm8974.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1153 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1154 <&mmcc MMSS_S0_AXI_CLK>;
1862 mmcc: clock-controller@fd8c0000 { label
1863 compatible = "qcom,mmcc-msm8974";
1899 power-domains = <&mmcc MDSS_GDSC>;
1901 clocks = <&mmcc MDSS_AHB_CLK>,
1902 <&mmcc MDSS_AXI_CLK>,
1903 <&mmcc MDSS_VSYNC_CLK>;
1925 clocks = <&mmcc MDSS_AHB_CLK>,
[all …]
|
| D | qcom-msm8226-microsoft-common.dtsi | 43 clocks = <&mmcc MDSS_AHB_CLK>,
44 <&mmcc MDSS_AXI_CLK>,
45 <&mmcc MDSS_BYTE0_CLK>,
46 <&mmcc MDSS_MDP_CLK>,
47 <&mmcc MDSS_PCLK0_CLK>,
48 <&mmcc MDSS_VSYNC_CLK>;
49 power-domains = <&mmcc MDSS_GDSC>;
|
| /linux-6.8/drivers/clk/qcom/ |
| D | Makefile | 22 obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
51 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
52 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
53 obj-$(CONFIG_MSM_MMCC_8994) += mmcc-msm8994.o
54 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
55 obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o
96 obj-$(CONFIG_SDM_MMCC_660) += mmcc-sdm660.o
|
| /linux-6.8/sound/soc/codecs/ |
| D | cs42l73.c | 33 u8 spc, mmcc, spfs; member
785 u8 mmcc; member
940 u8 spc, mmcc; in cs42l73_set_dai_fmt() local
943 mmcc = snd_soc_component_read(component, CS42L73_MMCC(id)); in cs42l73_set_dai_fmt()
947 mmcc |= CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
951 mmcc &= ~CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
967 if (mmcc & CS42L73_MS_MASTER) { in cs42l73_set_dai_fmt()
1003 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1055 if (priv->config[id].mmcc & CS42L73_MS_MASTER) { in cs42l73_pcm_hw_params()
1065 "DAI[%d]: MCLK %u, srate %u, MMCC[5:0] = %x\n", in cs42l73_pcm_hw_params()
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/iommu/ |
| D | msm,iommu-v0.txt | 50 <&mmcc SMMU_AHB_CLK>,
51 <&mmcc MDP_AXI_CLK>;
|