/linux/drivers/mmc/host/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # MMC/SD host controller drivers 6 comment "MMC/SD/SDIO Host Controller Drivers" 9 bool "MMC host drivers debugging" 10 depends on MMC != n 13 say N here. This enables MMC host driver debugging. And further 18 tristate "Sunplus SP7021 MMC Controller" 37 bool "Qualcomm Data Mover for SD Card Controller" 41 This selects the Qualcomm Data Mover lite/local on SD Card controller. 43 Qcom SOCs and MMC, you would probably need this option to get DMA working. [all …]
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H A D | wmt-sdmmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * WM8505/WM8650 SD/MMC Host Controller 14 #include <linux/dma-mapping.h> 25 #include <linux/mmc/host.h> 26 #include <linux/mmc/mmc.h> 27 #include <linux/mmc/sd.h> 32 #define DRIVER_NAME "wmt-sdhc" 35 /* MMC/SD controller registers */ 121 /* MMC/SD DMA Controller Registers */ 185 struct mmc_host *mmc; member [all …]
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H A D | sdricoh_cs.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be 6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de> 25 #include <linux/mmc/host.h> 26 #include <linux/mmc/mmc.h> 70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed, 77 /* mmc privdata */ 80 struct mmc_host *mmc; /* MMC structure */ member 91 unsigned int value = readl(host->iobase + reg); in sdricoh_readl() 92 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value); in sdricoh_readl() [all …]
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | loongson,ls2k0500-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/loongson,ls2k0500-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: The SD/SDIO/eMMC host controller for Loongson-2K family SoCs 10 The MMC host controller on the Loongson-2K0500/2K1000 (using an externally 11 shared apbdma controller) provides the SD and SDIO device interfaces. 12 The two MMC host controllers on the Loongson-2K2000 are similar, 13 except that they use internal exclusive DMA. one controller provides 17 - Binbin Zhou <zhoubinbin@loongson.cn> [all …]
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H A D | amlogic,meson-gx-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic SD / eMMC controller for S905/GXBB family SoCs 10 The MMC 5.1 compliant host controller on Amlogic provides the 14 - Neil Armstrong <neil.armstrong@linaro.org> 17 - $ref: mmc-controller.yaml# 22 - const: amlogic,meson-axg-mmc 23 - items: [all …]
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H A D | starfive,jh7110-mmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: StarFive Designware Mobile Storage Host Controller 10 StarFive uses the Synopsys designware mobile storage host controller 11 to interface a SoC with storage medium such as eMMC or SD/MMC cards. 14 - $ref: synopsys-dw-mshc-common.yaml# 17 - William Qiu <william.qiu@starfivetech.com> 21 const: starfive,jh7110-mmc [all …]
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H A D | mmc-controller-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller & Slots Common Properties 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers and the 14 possible slots or ports for multi-slot controllers. 17 "#address-cells": 22 "#size-cells": [all …]
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H A D | cavium-mmc.txt | 1 * Cavium Octeon & ThunderX MMC controller 3 The highspeed MMC host controller on Caviums SoCs provides an interface 4 for MMC and SD types of memory cards. 10 - compatible : should be one of: 11 cavium,octeon-6130-mmc 12 cavium,octeon-7890-mmc 13 cavium,thunder-8190-mmc 14 cavium,thunder-8390-mmc 15 mmc-slot 16 - reg : mmc controller base registers [all …]
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H A D | sunplus,mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/mmc/sunplus,mmc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Sunplus MMC Controller 11 - Tony Huang <tonyhuang.sunplus@gmail.com> 12 - Li-hao Kuo <lhjeff911@gmail.com> 15 - $ref: mmc-controller.yaml 20 - sunplus,sp7021-mmc 35 - compatible [all …]
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H A D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Common Properties 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers. Any host 17 It is possible to assign a fixed index mmcN to an MMC host controller 21 $ref: mmc-controller-common.yaml# 25 pattern: "^mmc(@.*)?$" [all …]
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H A D | mxs-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/mxs-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale MXS MMC controller 10 - Shawn Guo <shawnguo@kernel.org> 13 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller 14 to support MMC, SD, and SDIO types of memory cards. 16 This file documents differences between the core properties in mmc.txt 20 - $ref: mmc-controller-common.yaml# [all …]
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H A D | brcm,sdhci-brcmstb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom BRCMSTB/BMIPS SDHCI Controller 10 - Al Cooper <alcooperx@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 16 - items: 17 - enum: 18 - brcm,bcm7216-sdhci [all …]
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H A D | amlogic,meson-mx-sdio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller 10 The highspeed MMC host controller on Amlogic SoCs provides an interface 11 for MMC, SD, SDIO and SDHC types of memory cards. 20 - Neil Armstrong <neil.armstrong@linaro.org> 25 - enum: 26 - amlogic,meson8-sdio [all …]
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H A D | ti-omap.txt | 1 * TI MMC host controller for OMAP1 and 2420 3 The MMC Host Controller on TI OMAP1 and 2420 family provides 4 an interface for MMC, SD, and SDIO types of memory cards. 7 by mmc.txt and the properties used by the omap mmc driver. 13 - compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers 14 - ti,hwmods: For 2420, must be "msdi<n>", where n is controller 19 msdi1: mmc@4809c000 { 20 compatible = "ti,omap2420-mmc"; 25 dma-names = "tx", "rx";
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H A D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller 4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties 5 used by the sdhci-st driver. 8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407" 9 to set the internal glue logic used for configuring the MMC 13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory) 14 See: Documentation/devicetree/bindings/resource-names.txt 15 - clocks: Phandle to the clock. 16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt 18 - interrupts: One mmc interrupt should be described here. [all …]
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H A D | davinci_mmc.txt | 1 * TI Highspeed MMC host controller for DaVinci 3 The Highspeed MMC Host Controller on TI DaVinci family 4 provides an interface for MMC, SD and SDIO types of memory cards. 9 - compatible: 10 Should be "ti,da830-mmc": for da830, da850, dm365 11 Should be "ti,dm355-mmc": for dm355, dm644x 14 - bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1> 15 - max-frequency: Maximum operating clock frequency, default 25MHz. 16 - dmas: List of DMA specifiers with the controller specific format 19 - dma-names: RX and TX DMA request names. These strings correspond [all …]
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H A D | owl-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/owl-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Actions Semi Owl SoCs SD/MMC/SDIO controller 10 - $ref: mmc-controller.yaml 13 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 18 - const: actions,owl-mmc 19 - items: 20 - enum: [all …]
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H A D | moxa,moxart-mmc.txt | 1 MOXA ART MMC Host Controller Interface 3 Inherits from mmc binding[1]. 5 [1] Documentation/devicetree/bindings/mmc/mmc.txt 9 - compatible : Must be "moxa,moxart-mmc" or "faraday,ftsdc010" 10 - reg : Should contain registers location and length 11 - interrupts : Should contain the interrupt number 12 - clocks : Should contain phandle for the clock feeding the MMC controller 16 - dmas : Should contain two DMA channels, line request number must be 5 for 18 - dma-names : Must be "tx", "rx" 22 mmc: mmc@98e00000 { [all …]
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H A D | amlogic,meson-mx-sdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson SDHC controller 10 - $ref: mmc-controller.yaml 13 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC 17 card interface with 1/4/8-bit bus width. 23 - enum: [all …]
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H A D | allwinner,sun4i-a10-mmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/allwinner,sun4i-a10-mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A10 MMC Controller 10 - $ref: mmc-controller.yaml 13 - Chen-Yu Tsai <wens@csie.org> 14 - Maxime Ripard <mripard@kernel.org> 17 "#address-cells": true 18 "#size-cells": true [all …]
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H A D | sprd,sdhci-r11.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Spreadtrum SDHCI controller 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 16 const: sprd,sdhci-r11 27 - description: SDIO source clock [all …]
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H A D | ingenic,mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs MMC Controller 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: mmc-controller.yaml# 18 - enum: 19 - ingenic,jz4740-mmc 20 - ingenic,jz4725b-mmc [all …]
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/linux/arch/mips/boot/dts/ingenic/ |
H A D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 16 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 20 clock-names = "cpu"; 24 cpuintc: interrupt-controller { [all …]
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/linux/arch/mips/boot/dts/mobileye/ |
H A D | eyeq6h.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 6 #include <dt-bindings/interrupt-controller/mips-gic.h> 8 #include <dt-bindings/clock/mobileye,eyeq5-clk.h> 11 #address-cells = <2>; 12 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 28 cpu_intc: interrupt-controller { 29 compatible = "mti,cpu-interrupt-controller"; 30 interrupt-controller; [all …]
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/linux/arch/arm/boot/dts/actions/ |
H A D | owl-s500.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright (c) 2016-2017 Andreas Färber 8 #include <dt-bindings/clock/actions,s500-cmu.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/owl-s500-powergate.h> 12 #include <dt-bindings/reset/actions,s500-reset.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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