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/linux/Documentation/admin-guide/media/
H A Dimx7.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
34 --------
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H A Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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H A Dc3-isp.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR MIT)
21 The driver has been tested on AW419-C308L-Socket platform.
29 - 1 MIPI-CSI-2 module: handles the physical layer of the MIPI CSI-2 receiver and
31 - 1 MIPI-ADAPTER module: organizes MIPI data to meet ISP input requirements and
32 send MIPI data to ISP.
33 - 1 ISP (Image Signal Processing) module: contains a pipeline of image processing
37 A high-level functional view of the C3 ISP is presented below.::
39 +----------+ +-------+
40 | Resizer |--->| WRMIF |
41 +---------+ +------------+ +--------------+ +-------+ |----------+ +-------+
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H A Dstarfive_camss.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ------------
24 ----------------------------------
28 |\ +---------------+ +-----------+
29 +----------+ | \ | | | |
31 | MIPI |----->| |----->| ISP |----->| |
33 +----------+ | | | | | Memory |
34 |MUX| +---------------+ | Interface |
35 +----------+ | | | |
36 | | | |---------------------------->| |
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/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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/linux/drivers/media/platform/amlogic/c3/mipi-csi2/
H A Dc3-mipi-csi2.c1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
14 #include <media/v4l2-async.h>
15 #include <media/v4l2-common.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-fwnode.h>
18 #include <media/v4l2-mc.h>
19 #include <media/v4l2-subdev.h>
21 /* C3 CSI-2 submodule definition */
38 #define MIPI_CSI2_SUBDEV_NAME "c3-mipi-csi2"
40 /* C3 CSI-2 APHY register */
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 tristate "Amlogic C3 MIPI CSI-2 receiver"
12 Video4Linux2 driver for Amlogic C3 MIPI CSI-2 receiver.
13 C3 MIPI CSI-2 receiver is used to receive MIPI data from
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
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H A Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
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/linux/Documentation/devicetree/bindings/media/
H A Dfsl,imx6-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/fsl,imx6-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI CSI-2 Receiver core in the i.MX SoC
10 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
11 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
12 combined with a D-PHY core mixed into the same register block. In
13 addition this device consists of an i.MX-specific "CSI2IPU gasket"
16 controller's 32-bit output image bus onto four 16-bit parallel busses
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H A Dnxp,imx-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
10 - Rui Miguel Silva <rmfrfs@gmail.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
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H A Dnxp,imx8mq-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ MIPI CSI-2 receiver
10 - Martin Kepplinger <martin.kepplinger@puri.sm>
12 description: |-
13 This binding covers the CSI-2 RX PHY and host controller included in the
20 - enum:
21 - fsl,imx8mq-mipi-csi2
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H A Dallwinner,sun8i-a83t-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83T MIPI CSI-2
10 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 const: allwinner,sun8i-a83t-mipi-csi2
24 - description: Bus Clock
25 - description: Module Clock
26 - description: MIPI-specific Clock
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H A Damlogic,c3-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/amlogic,c3-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic C3 MIPI CSI-2 receiver
10 - Keke Li <keke.li@amlogic.com>
13 MIPI CSI-2 receiver contains CSI-2 RX PHY and host controller.
14 It receives the MIPI data from the image sensor and sends MIPI data
15 to MIPI adapter.
20 - amlogic,c3-mipi-csi2
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H A Dallwinner,sun6i-a31-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI CSI-2
10 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
15 - const: allwinner,sun6i-a31-mipi-csi2
16 - items:
17 - const: allwinner,sun8i-v3s-mipi-csi2
18 - const: allwinner,sun6i-a31-mipi-csi2
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H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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H A Drenesas,rzg2l-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - items:
22 - enum:
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H A Draspberrypi,rp1-cfe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/raspberrypi,rp1-cfe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
16 - MIPI D-PHY
17 - MIPI CSI-2 receiver
18 - Simple image processor (called PiSP Front End, or FE)
21 https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf
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/linux/drivers/media/platform/rockchip/rkisp1/
H A Drkisp1-csi.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Rockchip ISP1 Driver - CSI-2 Receiver
16 #include <linux/phy/phy-mipi-dphy.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-fwnode.h>
21 #include "rkisp1-common.h"
22 #include "rkisp1-csi.h"
37 struct rkisp1_csi *csi = &rkisp1->csi; in rkisp1_csi_link_sensor() local
40 s_asd->pixel_rate_ctrl = v4l2_ctrl_find(sd->ctrl_handler, in rkisp1_csi_link_sensor()
42 if (!s_asd->pixel_rate_ctrl) { in rkisp1_csi_link_sensor()
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/linux/drivers/acpi/
H A Dmipi-disco-img.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MIPI DisCo for Imaging support.
7 * Support MIPI DisCo for Imaging by parsing ACPI _CRS CSI-2 records defined in
8 * Section 6.4.3.8.2.4 "Camera Serial Interface (CSI-2) Connection Resource
9 * Descriptor" of ACPI 6.5 and using device properties defined by the MIPI DisCo
12 * The implementation looks for the information in the ACPI namespace (CSI-2
14 * Documentation/firmware-guide/acpi/dsd/graph.rst to represent the CSI-2
16 * extracted from the _CRS CSI-2 resource descriptors and the MIPI DisCo
18 * with CSI-2 connections.
31 #include <media/v4l2-fwnode.h>
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/linux/drivers/media/platform/nxp/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "NXP CSI Bridge driver"
17 Driver for the NXP Camera Sensor Interface (CSI) Bridge. This device
21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
39 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver
42 source "drivers/media/platform/nxp/imx8-isi/Kconfig"
53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
57 tristate "NXP MX2 eMMa-PrP support"
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/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-generic.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
8 Generic line-based metadata formats
14 These generic line-based metadata formats define the memory layout of the data
17 .. _v4l2-meta-fmt-generic-8:
20 -----------------------
22 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format
23 is used on CSI-2 for 8 bits per :term:`Data Unit`.
26 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is
27 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`.
34 .. flat-table:: Sample 4x2 Metadata Frame
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/linux/drivers/staging/media/tegra-video/
H A Dcsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <media/media-entity.h>
10 #include <media/v4l2-async.h>
11 #include <media/v4l2-subdev.h>
14 * Each CSI brick supports max of 4 lanes that can be used as either
15 * one x4 port using both CILA and CILB partitions of a CSI brick or can
22 /* Maximum 2 CSI x4 ports can be ganged up for streaming */
25 /* each CSI channel can have one sink and one source pads */
42 * struct tegra_csi_channel - Tegra CSI channel
48 * @csi: Tegra CSI device structure
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/linux/drivers/phy/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "MediaTek PCIe-PHY Driver"
17 tristate "MediaTek 10GE SerDes XFI T-PHY driver"
22 Say 'Y' here to add support for MediaTek XFI T-PHY driver.
23 The driver provides access to the Ethernet SerDes T-PHY supporting
28 tristate "MediaTek T-PHY Driver"
34 Say 'Y' here to add support for MediaTek T-PHY driver,
36 SATA, and meanwhile supports two version T-PHY which have
37 different banks layout, the T-PHY with shared banks between
38 multi-ports is first version, otherwise is second version,
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/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtoshiba,tc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
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