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/linux-5.10/drivers/mtd/maps/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Support non-linear mappings of flash chips"
13 tristate "Flash device in physical memory map"
17 ROM driver code to communicate with chips which are mapped
18 physically into the CPU's memory. You will need to configure
21 with config options or at run-time.
42 This is the physical memory location at which the flash chips
43 are mapped on your particular target board. Refer to the
44 memory map which should hopefully be in the documentation for
54 physical memory map between the chips, this could be larger
[all …]
/linux-5.10/Documentation/admin-guide/mm/
Dpagemap.rst14 physical frame each virtual page is mapped to. It contains one 64-bit
18 * Bits 0-54 page frame number (PFN) if present
19 * Bits 0-4 swap type if swapped
20 * Bits 5-54 swap offset if swapped
21 * Bit 55 pte is soft-dirty (see
22 :ref:`Documentation/admin-guide/mm/soft-dirty.rst <soft_dirty>`)
23 * Bit 56 page exclusively mapped (since 4.2)
24 * Bits 57-60 zero
25 * Bit 61 page is file-page or shared-anon (since 3.5)
30 In 4.0 and 4.1 opens by unprivileged fail with -EPERM. Starting from
[all …]
Dnommu-mmap.rst2 No-MMU memory mapping support
5 The kernel has limited support for memory mapping under no-MMU conditions, such
6 as are used in uClinux environments. From the userspace point of view, memory
12 Memory mapping behaviour also involves the way fork(), vfork(), clone() and
16 The behaviour is similar between the MMU and no-MMU cases, but not identical;
21 In the MMU case: VM regions backed by arbitrary pages; copy-on-write
24 In the no-MMU case: VM regions backed by arbitrary contiguous runs of
31 the no-MMU case doesn't support these, behaviour is identical to
39 In the no-MMU case:
41 - If one exists, the kernel will re-use an existing mapping to the
[all …]
Didle_page_tracking.rst10 The idle page tracking feature allows to track which memory pages are being
13 account when configuring the workload parameters, setting memory cgroup limits,
24 Currently, it consists of the only read-write file,
27 The file implements a bitmap where each bit corresponds to a memory page. The
28 bitmap is represented by an array of 8-byte integers, and the page at PFN #i is
29 mapped to bit #i%64 of array element #i/64, byte order is native. When a bit is
36 the page by writing to the file. A value written to the file is OR-ed with the
39 Only accesses to user memory pages are tracked. These are pages mapped to a
48 -EINVAL if you are not starting the read/write on an 8-byte boundary, or
50 this file beyond max PFN will return -ENXIO.
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/linux-5.10/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
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/linux-5.10/drivers/net/ethernet/cavium/liquidio/
Docteon_mem_ops.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * \brief Host Driver: Routines used to read/write Octeon memory.
27 /** Read a 64-bit value from a BAR1 mapped core memory address.
28 * @param oct - pointer to the octeon device.
29 * @param core_addr - the address to read from.
32 * in which core_addr is mapped.
34 * @return 64-bit value read from Core memory
38 /** Read a 32-bit value from a BAR1 mapped core memory address.
39 * @param oct - pointer to the octeon device.
[all …]
/linux-5.10/Documentation/vm/
Dunevictable-lru.rst13 This document describes the Linux memory manager's "Unevictable LRU"
21 details - the "what does it do?" - by reading the code. One hopes that the
33 memory x86_64 systems.
35 To illustrate this with an example, a non-NUMA x86_64 platform with 128GB of
36 main memory will have over 32 million 4k pages in a single zone. When a large
47 * Those mapped into SHM_LOCK'd shared memory regions.
49 * Those mapped into VM_LOCKED [mlock()ed] VMAs.
56 -------------------------
58 The Unevictable LRU infrastructure consists of an additional, per-zone, LRU list
70 system - which means we get to use the same code to manipulate them, the
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/linux-5.10/drivers/scsi/lpfc/
Dlpfc_mem.c4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2014 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
46 #define LPFC_MEM_POOL_SIZE 64 /* max elem in non-DMA safety pool */
48 #define LPFC_RRQ_POOL_SIZE 256 /* max elements in non-DMA pool */
53 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; in lpfc_mem_alloc_active_rrq_pool_s4()
56 return -ENOMEM; in lpfc_mem_alloc_active_rrq_pool_s4()
57 bytes = ((BITS_PER_LONG - 1 + max_xri) / BITS_PER_LONG) * in lpfc_mem_alloc_active_rrq_pool_s4()
59 phba->cfg_rrq_xri_bitmap_sz = bytes; in lpfc_mem_alloc_active_rrq_pool_s4()
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/linux-5.10/drivers/virtio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
42 If disabled, you get a slightly smaller, non-transitional driver,
70 This driver provides access to virtio-pmem devices, storage devices
71 that are mapped into the physical address space - similar to NVDIMMs
72 - with a virtio-based flushing interface.
83 of memory within a KVM guest.
96 This driver provides access to virtio-mem paravirtualized memory
97 devices, allowing to hotplug and hotunplug memory.
99 This driver was only tested under x86-64, but should theoretically
100 work on all architectures that support memory hotplug and hotremove.
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/linux-5.10/Documentation/userspace-api/media/v4l/
Dmmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 Streaming I/O (Memory Mapping)
14 streaming methods, to determine if the memory mapping flavor is
16 with the memory type set to ``V4L2_MEMORY_MMAP``.
19 between application and driver, the data itself is not copied. Memory
20 mapping is primarily intended to map buffers in device memory into the
21 application's address space. Device memory can be for example the video
22 memory on a graphics card with a video capture add-on. However, being
24 drivers support streaming as well, allocating buffers in DMA-able main
25 memory.
[all …]
Dvidioc-reqbufs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_REQBUFS - Initiate Memory Mapping, User Pointer I/O or DMA buffer I/O
34 This ioctl is used to initiate :ref:`memory mapped <mmap>`,
36 Memory mapped buffers are located in device memory and must be allocated
37 with this ioctl before they can be mapped into the application's address
48 the desired number of buffers, ``memory`` must be set to the requested
53 requested, even zero, when the driver runs out of free memory. A larger
62 buffers. Note that if any buffers are still mapped or exported via DMABUF,
76 .. flat-table:: struct v4l2_requestbuffers
77 :header-rows: 0
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Dfunc-mmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-mmap:
13 v4l2-mmap - Map device memory into application address space
18 .. code-block:: c
36 Length of the memory area to map. This must be the same value as
39 single-planar API, and the same value as returned by the driver in
41 the multi-planar API.
44 The ``prot`` argument describes the desired memory protection.
57 #. Device memory accesses (e. g. the memory on a graphics card
59 compared to main memory accesses, or reads may be significantly
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/linux-5.10/Documentation/userspace-api/media/dvb/
Ddmx-reqbufs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 DMX_REQBUFS - Initiate Memory Mapping and/or DMA buffer I/O
36 This ioctl is used to initiate a memory mapped or DMABUF based demux I/O.
38 Memory mapped buffers are located in device memory and must be allocated
39 with this ioctl before they can be mapped into the application's address
54 … be smaller than the number requested, even zero, when the driver runs out of free memory. A larger
63 buffers, however this cannot succeed when any buffers are still mapped.
70 On success 0 is returned, on error -1 and the ``errno`` variable is set
72 :ref:`Generic Error Codes <gen-errors>` chapter.
Ddmx-mmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _dmx-mmap:
13 dmx-mmap - Map device memory into application address space
20 .. code-block:: c
38 Length of the memory area to map. This must be a multiple of the
42 The ``prot`` argument describes the desired memory protection.
49 The ``flags`` parameter specifies the type of the mapped object,
50 mapping options and whether modifications made to the mapped copy of
61 ``MAP_SHARED`` allows applications to share the mapped memory with
62 other (e. g. child-) processes.
[all …]
/linux-5.10/include/xen/interface/
Dmemory.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * memory.h
5 * Memory reservation and information.
16 * Increase or decrease the specified domain's memory reservation. Returns a
17 * -ve errcode on failure, or the # extents successfully allocated or freed.
31 * IN: GPFN bases of extents to populate with memory
43 * I/O devices often have a 32-bit limitation even in 64-bit systems). If
59 * An atomic exchange of memory pages. If return code is zero then
60 * @out.extent_list provides GMFNs of the newly-allocated memory.
68 * [IN] Details of memory extents to be exchanged (GMFN bases).
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/linux-5.10/arch/um/kernel/
Dphysmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
12 #include <as-layout.h>
18 static int physmem_fd = -1;
50 if (err == -ENOMEM) in map_memory()
53 "memory size>/4096\n"); in map_memory()
60 * setup_physmem() - Setup physical memory for UML
61 * @start: Start address of the physical kernel memory,
63 * @reserve_end: end address of the physical kernel memory.
64 * @len: Length of total physical memory that should be mapped/made
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/linux-5.10/mm/
Dzpool.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * zpool memory storage api
7 * This is a common frontend for memory storage pool implementations.
8 * Typically, this is used to store compressed memory.
37 * zpool_register_driver() - register a zpool implementation.
43 atomic_set(&driver->refcount, 0); in zpool_register_driver()
44 list_add(&driver->list, &drivers_head); in zpool_register_driver()
50 * zpool_unregister_driver() - unregister a zpool implementation.
64 refcount = atomic_read(&driver->refcount); in zpool_unregister_driver()
67 ret = -EBUSY; in zpool_unregister_driver()
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/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
5 node must be a child of the memory-mapped device. The driver currently only
6 supports devices with 8, 16 or 32-bit registers.
10 - compatible : string, must contain "mdio-mux-mmioreg"
12 - reg : integer, contains the offset of the register that controls the bus
16 - mux-mask : integer, contains an eight-bit mask that specifies which
18 'reg' property of each child mdio-mux node must be constrained by
23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
[all …]
/linux-5.10/drivers/media/pci/cx18/
Dcx18-io.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * cx18 driver PCI memory mapped IO access routines
12 #include "cx18-driver.h"
23 /* Non byteswapping memory mapped IO */
45 /* Normal memory mapped IO */
136 /* Access "register" region of CX23418 memory mapped I/O */
139 cx18_writel_noretry(cx, val, cx->reg_mem + reg); in cx18_write_reg_noretry()
144 cx18_writel(cx, val, cx->reg_mem + reg); in cx18_write_reg()
150 cx18_writel_expect(cx, val, cx->reg_mem + reg, eval, mask); in cx18_write_reg_expect()
155 return cx18_readl(cx, cx->reg_mem + reg); in cx18_read_reg()
[all …]
/linux-5.10/drivers/visorbus/
Dvisorchannel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010 - 2015 UNISYS CORPORATION
8 * This provides s-Par channel communication primitives, which are
31 void *mapped; member
53 if (channel->mapped) { in visorchannel_destroy()
54 memunmap(channel->mapped); in visorchannel_destroy()
55 if (channel->requested) in visorchannel_destroy()
56 release_mem_region(channel->physaddr, channel->nbytes); in visorchannel_destroy()
63 return channel->physaddr; in visorchannel_get_physaddr()
68 return channel->nbytes; in visorchannel_get_nbytes()
[all …]
/linux-5.10/include/linux/
Dmemremap.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/percpu-refcount.h>
12 * struct vmem_altmap - pre-allocated storage for vmemmap_populate
14 * @reserve: pages mapped, but reserved for driver use (relative to @base)
29 * Specialize ZONE_DEVICE memory into multiple types each having differents
33 * Device memory that is not directly addressable by the CPU: CPU can neither
34 * read nor write private memory. In this case, we do still have struct pages
35 * backing the device memory. Doing so simplifies the implementation, but it is
39 * A more complete discussion of unaddressable memory may be found in
43 * Host memory that has similar access semantics as System RAM i.e. DMA
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/linux-5.10/Documentation/core-api/
Ddma-api.rst8 of the API (and actual examples), see :doc:`/core-api/dma-api-howto`.
11 Part II describes extensions for supporting non-consistent memory
13 non-consistent platforms (this is usually only legacy platforms) you
16 Part I - dma_API
17 ----------------
19 To get the dma_API, you must #include <linux/dma-mapping.h>. This
27 Part Ia - Using large DMA-coherent buffers
28 ------------------------------------------
36 Consistent memory is memory for which a write by either the device or
40 devices to read that memory.)
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/linux-5.10/arch/sh/mm/
Dioremap.c5 * (C) Copyright 2005 - 2010 Paul Mundt
7 * Re-map IO memory to kernel address space so that we can access it.
8 * This is needed for high PCI addresses that aren't mapped in the
9 * 640k-1MB IO memory area on PC's
31 * On 32-bit SH, we traditionally have the whole physical address space mapped
42 phys_addr_t last_addr = offset + size - 1; in __ioremap_29bit()
46 * mapped. Uncached access for P1 addresses are done through P2. in __ioremap_29bit()
47 * In the P3 case or for addresses outside of the 29-bit space, in __ioremap_29bit()
65 /* P4 above the store queues are always mapped. */ in __ioremap_29bit()
80 * NOTE! We need to allow non-page-aligned mappings too: we will obviously
[all …]
/linux-5.10/arch/xtensa/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
47 Xtensa processors are 32-bit RISC machines designed by Tensilica
52 a home page at <http://www.linux-xtensa.org/>.
96 bool "fsf - default (not generic) configuration"
100 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
107 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
143 ie: it supports a TLB with auto-loading, page protection.
172 bool "Unaligned memory access in user space"
175 memory accesses in hardware but through an exception handler.
176 Per default, unaligned memory accesses are disabled in user space.
[all …]
/linux-5.10/Documentation/scsi/
Dg_NCR5380.rst1 .. SPDX-License-Identifier: GPL-2.0
16 memory mapped modes.
25 The NCR53c400 does not support DMA but it does have Pseudo-DMA which is
38 base=xx[,...] the port or base address(es) (for port or memory mapped, resp.)
50 These old-style parameters can support only one card:
54 ncr_addr=xx the port or base address (for port or memory
55 mapped, resp.)
71 E.g. a port mapped NCR5380 board, driver to probe for IRQ::
79 E.g. a memory mapped NCR53C400 board with no IRQ::
87 E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ

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