| /linux-5.10/Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
[all …]
|
| /linux-5.10/Documentation/cpu-freq/ |
| D | cpu-drivers.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 - Dominik Brodowski <linux@brodo.de>
11 - Rafael J. Wysocki <rafael.j.wysocki@intel.com>
12 - Viresh Kumar <viresh.kumar@linaro.org>
18 1.2 Per-CPU Initialization
24 2. Frequency Table Helpers
31 So, you just got a brand-new CPU / chipset with datasheets and want to
37 ------------------
46 .name - The name of this driver.
48 .init - A pointer to the per-policy initialization function.
[all …]
|
| /linux-5.10/drivers/cpufreq/ |
| D | freq_table.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2002 - 2003 Dominik Brodowski
14 * FREQUENCY TABLE HELPERS *
19 struct cpufreq_frequency_table *pos, *table = policy->freq_table; in policy_has_boost_freq()
25 if (pos->flags & CPUFREQ_BOOST_FREQ) in policy_has_boost_freq()
41 freq = pos->frequency; in cpufreq_frequency_table_cpuinfo()
44 && (pos->flags & CPUFREQ_BOOST_FREQ)) in cpufreq_frequency_table_cpuinfo()
47 pr_debug("table entry %u: %u kHz\n", (int)(pos - table), freq); in cpufreq_frequency_table_cpuinfo()
54 policy->min = policy->cpuinfo.min_freq = min_freq; in cpufreq_frequency_table_cpuinfo()
55 policy->max = policy->cpuinfo.max_freq = max_freq; in cpufreq_frequency_table_cpuinfo()
[all …]
|
| /linux-5.10/Documentation/devicetree/bindings/iio/resolver/ |
| D | ad2s90.txt | 1 Analog Devices AD2S90 Resolver-to-Digital Converter
6 - compatible: should be "adi,ad2s90"
7 - reg: SPI chip select number for the device
8 - spi-max-frequency: set maximum clock frequency, must be 830000
9 - spi-cpol and spi-cpha:
11 spi-cpha, spi-cpol.
14 Documentation/devicetree/bindings/spi/spi-bus.txt
16 Note about max frequency:
17 Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns
21 2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives
[all …]
|
| /linux-5.10/arch/arm/boot/dts/ |
| D | qcom-msm8960-cdp.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
8 compatible = "qcom,msm8960-cdp", "qcom,msm8960";
15 stdout-path = "serial0:115200n8";
41 compatible = "qcom,rpm-pm8921-regulators";
42 vin_lvs1_3_6-supply = <&pm8921_s4>;
43 vin_lvs2-supply = <&pm8921_s4>;
44 vin_lvs4_5_7-supply = <&pm8921_s4>;
45 vdd_ncp-supply = <&pm8921_l6>;
[all …]
|
| D | bcm28155-ap.dts | 14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
22 compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
35 clock-frequency = <400000>;
40 clock-frequency = <400000>;
45 clock-frequency = <400000>;
50 clock-frequency = <100000>;
58 non-removable;
59 max-frequency = <48000000>;
60 vmmc-supply = <&camldo1_reg>;
[all …]
|
| D | exynos5420-cpus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
16 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting
17 * from the LITTLE: Cortex-A7.
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a15";
30 clock-frequency = <1800000000>;
31 cci-control-port = <&cci_control1>;
32 operating-points-v2 = <&cluster_a15_opp_table>;
[all …]
|
| D | exynos5422-cpus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422
15 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting
16 * from the LITTLE: Cortex-A7.
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a7";
29 clock-frequency = <1000000000>;
30 cci-control-port = <&cci_control0>;
31 operating-points-v2 = <&cluster_a7_opp_table>;
[all …]
|
| D | qcom-apq8064-sony-xperia-yuga.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "sony,xperia-yuga", "qcom,apq8064";
17 stdout-path = "serial0:115200n8";
20 gpio-keys {
21 compatible = "gpio-keys";
[all …]
|
| D | at91-sama5d4_ma5d4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
18 clock-frequency = <32768>;
22 clock-frequency = <12000000>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <20000000>;
29 clock-output-names = "clk20m";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
38 vmmc-supply = <&vcc_mmc0_reg>;
[all …]
|
| D | qcom-apq8064-cm-qs600.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 model = "CompuLab CM-QS600";
8 compatible = "qcom,apq8064-cm-qs600", "qcom,apq8064";
15 stdout-path = "serial0:115200n8";
19 #address-cells = <1>;
20 #size-cells = <1>;
22 compatible = "simple-bus";
[all …]
|
| D | qcom-apq8064-asus-nexus7-flo.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 compatible = "asus,nexus7-flo", "qcom,apq8064";
16 stdout-path = "serial0:115200n8";
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
[all …]
|
| D | qcom-mdm9615.dtsi | 7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
|
| /linux-5.10/Documentation/admin-guide/media/ |
| D | si4713.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 ----------------------------
26 Users must comply with local regulations on radio frequency (RF) transmission.
29 -------------------------
34 The I2C device driver exports a v4l2-subdev interface to the kernel.
36 using the v4l2-subdev calls (g_ext_ctrls, s_ext_ctrls).
42 Applications can use v4l2 radio API to specify frequency of operation, mute state,
48 ----------------------
51 Here is an output from v4l2-ctl util:
53 .. code-block:: none
[all …]
|
| /linux-5.10/include/linux/ |
| D | cpufreq.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
24 * Frequency values here are CPU kHz
26 * Maximum transition latency is in nanoseconds - if it's unknown,
30 #define CPUFREQ_ETERNAL (-1)
47 /* in 10^(-9) s = nanoseconds */
65 unsigned int max; /* in kHz */ member
68 unsigned int restore_freq; /* = policy->cur before transition */
93 * - Any routine that wants to read from the policy structure will
95 * - Any routine that will write to the policy structure and/or may take away
[all …]
|
| /linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
29 stdout-path = "serial0:115200n8";
37 sys_mclk: clock-mclk {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <25000000>;
43 reg_1p8v: regulator-1p8v {
[all …]
|
| D | fsl-ls1012a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
16 sys_mclk: clock-mclk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <24576000>;
22 reg_3p3v: regulator-3p3v {
23 compatible = "regulator-fixed";
[all …]
|
| /linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | qcom,spi-qup.txt | 4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
19 - clock-names: Should be "core" for the core clock and "iface" for the
22 - #address-cells: Number of cells required to define a chip select
[all …]
|
| /linux-5.10/Documentation/devicetree/bindings/net/wireless/ |
| D | ti,wlcore,spi.txt | 7 - compatible : Should be one of the following:
18 - reg : Chip select address of device
19 - spi-max-frequency : Maximum SPI clocking speed of device in Hz
20 - interrupts : Should contain parameters for 1 interrupt line.
21 - vwlan-supply : Point the node of the regulator that powers/enable the
25 - ref-clock-frequency : Reference clock frequency (should be set for wl12xx)
26 - clock-xtal : boolean, clock is generated from XTAL
28 - Please consult Documentation/devicetree/bindings/spi/spi-bus.txt
38 spi-max-frequency = <48000000>;
39 interrupt-parent = <&gpio3>;
[all …]
|
| /linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | cavium-mmc.txt | 10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
17 - clocks : phandle
20 - for cd, bus-width and additional generic mmc parameters
22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
[all …]
|
| /linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | selftest_rps.c | 1 // SPDX-License-Identifier: MIT
21 /* Try to isolate the impact of cstates from determing frequency response */
22 #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */
33 return -1; in cmp_u64()
45 return -1; in cmp_u32()
64 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) in create_spin_counter()
72 obj = i915_gem_object_create_internal(vm->i915, 64 << 10); in create_spin_counter()
76 end = obj->base.size / sizeof(u32) - 1; in create_spin_counter()
109 loop = cs - base; in create_spin_counter()
122 *cs++ = lower_32_bits(vma->node.start + end * sizeof(*cs)); in create_spin_counter()
[all …]
|
| /linux-5.10/tools/power/cpupower/utils/ |
| D | cpufreq-info.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
39 value[LINE_LEN - 1] = '\0'; in count_cpus()
40 if (strlen(value) < (LINE_LEN - 2)) in count_cpus()
62 unsigned long min, max; in proc_cpufreq_output() local
64 printf(_(" minimum CPU frequency - maximum CPU frequency - governor\n")); in proc_cpufreq_output()
72 if (cpufreq_get_hardware_limits(cpu, &min, &max)) { in proc_cpufreq_output()
73 max = 0; in proc_cpufreq_output()
75 min_pctg = (policy->min * 100) / max; in proc_cpufreq_output()
76 max_pctg = (policy->max * 100) / max; in proc_cpufreq_output()
[all …]
|
| /linux-5.10/drivers/memory/samsung/ |
| D | exynos5422-dmc.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/devfreq-event.h>
100 * struct dmc_opp_table - Operating level desciption
101 * @freq_hz: target frequency in Hz
104 * Covers frequency and voltage settings of the DMC operating mode.
112 * struct exynos5_dmc - main structure describing DMC device
119 * @lock: protects curr_rate and frequency/voltage setting section
120 * @curr_rate: current frequency
159 /* Protects curr_rate and frequency/voltage setting section */
195 __val = (t_val) << (timing)->bit_beg; \
[all …]
|
| /linux-5.10/kernel/sched/ |
| D | cpufreq_schedutil.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * CPUFreq governor based on scheduler-provided CPU utilization data.
57 unsigned long max; member
59 /* The field below is for single-CPU policies only: */
74 * Since cpufreq_update_util() is called with rq->lock held for in sugov_should_update_freq()
75 * the @target_cpu, our per-CPU data is fully serialized. in sugov_should_update_freq()
77 * However, drivers cannot in general deal with cross-CPU in sugov_should_update_freq()
82 * by the hardware, as calculating the frequency is pointless if in sugov_should_update_freq()
88 if (!cpufreq_this_cpu_can_update(sg_policy->policy)) in sugov_should_update_freq()
91 if (unlikely(sg_policy->limits_changed)) { in sugov_should_update_freq()
[all …]
|
| /linux-5.10/Documentation/devicetree/bindings/iio/imu/ |
| D | adi,adis16480.txt | 6 - compatible: Must be one of
12 * "adi,adis16495-1"
13 * "adi,adis16495-2"
14 * "adi,adis16495-3"
15 * "adi,adis16497-1"
16 * "adi,adis16497-2"
17 * "adi,adis16497-3"
18 - reg: SPI chip select number for the device
19 - spi-max-frequency: Max SPI frequency to use
20 see: Documentation/devicetree/bindings/spi/spi-bus.txt
[all …]
|