| /linux-5.10/Documentation/trace/ |
| D | stm.rst | 11 these masters and channels are statically allocated to certain
23 master 7 channel 15, while arbitrary user applications can use masters
28 identifiers to ranges of masters and channels. If these rules (policy)
33 have a name (string identifier) and a range of masters and channels
41 channels masters
42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters
48 masters 48 through 63 and channel allocation pool has channels 0
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| D | intel_th.rst | 37 GTH allows directing different STP masters into different output ports
38 via its "masters" attribute group. More detailed GTH interface
79 $ echo 0 > /sys/bus/intel_th/devices/0-gth/masters/33
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| /linux-5.10/drivers/vme/bridges/ |
| D | vme_fake.c | 65 struct fake_master_window masters[FAKE_MAX_MASTER]; member
317 bridge->masters[i].enabled = enabled; in fake_master_set()
318 bridge->masters[i].vme_base = vme_base; in fake_master_set()
319 bridge->masters[i].size = size; in fake_master_set()
320 bridge->masters[i].aspace = aspace; in fake_master_set()
321 bridge->masters[i].cycle = cycle; in fake_master_set()
322 bridge->masters[i].dwidth = dwidth; in fake_master_set()
349 *enabled = bridge->masters[i].enabled; in __fake_master_get()
350 *vme_base = bridge->masters[i].vme_base; in __fake_master_get()
351 *size = bridge->masters[i].size; in __fake_master_get()
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/iommu/ |
| D | iommu.txt | 49 association of masters to be configured. Note that an IOMMU can by design
56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
70 Devices that access memory through an IOMMU are called masters. A device can
91 - pasid-num-bits: Some masters support multiple address spaces for DMA, by
128 * Masters are statically associated with this IOMMU and share
130 * have sufficient information to distinguish between masters.
133 * all masters at any given point in time.
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| D | arm,smmu.yaml | 16 of address translation to bus masters external to the CPU.
85 SMMUs with stream matching support and complex masters may use a value of
107 NOTE: this only applies to the SMMU itself, not masters connected
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| /linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | dma-router.yaml | 25 dma-masters:
37 - dma-masters
49 dma-masters = <&sdma>;
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| D | snps,dw-axi-dmac.txt | 9 - snps,dma-masters: Number of AXI masters supported by the hardware.
34 snps,dma-masters = <2>;
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| D | st,stm32-dmamux.yaml | 34 - dma-masters
49 dma-masters = <&dma1 &dma2>;
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| D | lpc1850-dmamux.txt | 12 - dma-masters: phandle pointing to the DMA controller
41 dma-masters = <&dmac>;
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| D | snps,dma-spear1340.yaml | 56 dma-masters:
59 Number of DMA masters supported by the controller. In case if
169 dma-masters = <4>;
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| D | ti-dma-crossbar.txt | 10 - dma-masters: phandle pointing to the DMA controller
55 dma-masters = <&sdma>;
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| /linux-5.10/drivers/fsi/ |
| D | fsi-master.h | 4 * to allow the core to interact with the (hardware-specific) masters.
18 * These are used by hardware masters, such as the one in the FSP2, AST2600 and
59 #define FSI_MRESP_RST_ALL_MASTER 0x20000000 /* Reset all FSI masters */
77 * These are used by low level masters that bit-bang out the protocol
118 * These are common to all masters
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| /linux-5.10/Documentation/devicetree/bindings/fsi/ |
| D | fsi.txt | 11 FSI masters may require their own DT nodes (to describe the master HW itself);
15 Under the masters' nodes, we can describe the bus topology using nodes to
43 FSI masters
62 masters that may be present on the bus.
|
| /linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-class-stm | 1 What: /sys/class/stm/<stm>/masters
24 assigned masters.
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| D | configfs-stp-policy | 34 What: /config/stp-policy/<device>.<policy>/<node>/masters
38 Range of masters from which to allocate for users of this node.
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| D | sysfs-bus-intel_th-devices-gth | 1 What: /sys/bus/intel_th/devices/<intel_th_id>-gth/masters/*
5 Description: (RW) Configure output ports for STP masters. Writing -1
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| /linux-5.10/Documentation/devicetree/bindings/bus/ |
| D | brcm,gisb-arb.txt | 19 masters are valid at the system level
21 masters. Should match the number of bits set in brcm,gisb-master-mask and
|
| /linux-5.10/drivers/i2c/muxes/ |
| D | i2c-mux-pca9541.c | 29 * The PCA9541 is a bus master selector. It supports two I2C masters connected
38 * This driver assumes that the two bus masters are controlled by two different
39 * hosts. If a single host controls both masters, platform code has to ensure
40 * that only one of the masters is instantiated at any given time.
158 * The main contention point occurs if the slave bus is off and both masters
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| /linux-5.10/drivers/dma/ |
| D | stm32-dmamux.c | 46 u32 dma_reqs[]; /* Number of DMA Request per DMA masters.
47 * [0] holds number of DMA Masters.
131 dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", i - 1); in stm32_dmamux_route_allocate()
191 count = device_property_count_u32(&pdev->dev, "dma-masters"); in stm32_dmamux_probe()
204 dma_node = of_parse_phandle(node, "dma-masters", i - 1); in stm32_dmamux_probe()
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| /linux-5.10/Documentation/ABI/stable/ |
| D | sysfs-driver-firmware-zynqmp | 9 by system to pass information between masters.
36 masters.
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| /linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c-arb-gpio-challenge.txt | 13 * Having two masters on a bus in general makes it relatively hard to debug
20 All masters on the bus have a 'bus claim' line which is an output that the
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| D | i2c-demux-pinctrl.txt | 25 - i2c-parent: List of phandles of I2C masters available for selection. The first
134 - the i2c masters must have their status "disabled". This driver will
|
| /linux-5.10/Documentation/w1/ |
| D | w1-netlink.rst | 26 list current bus masters
92 w1_netlink_msg) plus number of masters multiplied by 4)
94 number of masters multiplied by 4 (u32 size))
|
| /linux-5.10/include/linux/ |
| D | stm.h | 45 * @hw_override: masters in the STP stream will not match the ones
58 * Normally, an STM device will have a range of masters available to software
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| /linux-5.10/drivers/mfd/ |
| D | qcom-pm8xxx.c | 178 int i, ret, masters = 0; in pm8xxx_irq_handler() local
188 /* on pm8xxx series masters start from bit 1 of the root */ in pm8xxx_irq_handler()
189 masters = root >> 1; in pm8xxx_irq_handler()
191 /* Read allowed masters for blocks. */ in pm8xxx_irq_handler()
193 if (masters & (1 << i)) in pm8xxx_irq_handler()
|