Searched full:lpddr4 (Results 1 – 25 of 32) sorted by relevance
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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ddr/ |
D | jedec,lpddr4.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml# 7 title: LPDDR4 SDRAM compliant to JEDEC JESD209-4 18 - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$" 19 - const: jedec,lpddr4 31 compatible = "lpddr4-ff,0100", "jedec,lpddr4";
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D | jedec,lpddr-channel.yaml | 23 - jedec,lpddr4-channel 85 const: jedec,lpddr4-channel 89 $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml# 128 compatible = "jedec,lpddr4-channel"; 132 compatible = "lpddr4-05,0301", "jedec,lpddr4"; 140 compatible = "lpddr4-05,0301", "jedec,lpddr4";
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/linux-6.15/arch/arm64/boot/dts/apple/ |
D | s8001-j98a-j99a.dtsi | 13 apple,always-on; /* LPDDR4 interface */ 17 apple,always-on; /* LPDDR4 interface */ 21 apple,always-on; /* LPDDR4 interface */ 25 apple,always-on; /* LPDDR4 interface */
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D | t8011-pro2.dtsi | 45 apple,always-on; /* LPDDR4 interface */ 49 apple,always-on; /* LPDDR4 interface */
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D | t8011-pmgr.dtsi | 500 apple,always-on; /* LPDDR4 interface */ 509 apple,always-on; /* LPDDR4 interface */ 518 apple,always-on; /* LPDDR4 interface */ 527 apple,always-on; /* LPDDR4 interface */ 536 apple,always-on; /* LPDDR4 interface */ 545 apple,always-on; /* LPDDR4 interface */
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D | t8103-pmgr.dtsi | 576 apple,always-on; /* LPDDR4 interface */ 585 apple,always-on; /* LPDDR4 interface */ 594 apple,always-on; /* LPDDR4 interface */ 603 apple,always-on; /* LPDDR4 interface */ 744 apple,always-on; /* LPDDR4 interface */ 753 apple,always-on; /* LPDDR4 interface */ 762 apple,always-on; /* LPDDR4 interface */ 771 apple,always-on; /* LPDDR4 interface */
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D | t8112-pmgr.dtsi | 530 apple,always-on; /* LPDDR4 interface */ 539 apple,always-on; /* LPDDR4 interface */ 548 apple,always-on; /* LPDDR4 interface */ 557 apple,always-on; /* LPDDR4 interface */ 566 apple,always-on; /* LPDDR4 interface */ 575 apple,always-on; /* LPDDR4 interface */ 584 apple,always-on; /* LPDDR4 interface */ 593 apple,always-on; /* LPDDR4 interface */
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D | t8010-pmgr.dtsi | 498 apple,always-on; /* LPDDR4 interface */ 507 apple,always-on; /* LPDDR4 interface */ 516 apple,always-on; /* LPDDR4 interface */ 525 apple,always-on; /* LPDDR4 interface */
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D | s8001-pmgr.dtsi | 449 apple,always-on; /* LPDDR4 interface */ 458 apple,always-on; /* LPDDR4 interface */ 467 apple,always-on; /* LPDDR4 interface */ 476 apple,always-on; /* LPDDR4 interface */
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D | s800-0-3-pmgr.dtsi | 491 apple,always-on; /* LPDDR4 interface */ 500 apple,always-on; /* LPDDR4 interface */ 509 apple,always-on; /* LPDDR4 interface */ 518 apple,always-on; /* LPDDR4 interface */
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D | t8012-pmgr.dtsi | 490 apple,always-on; /* LPDDR4 interface */ 499 apple,always-on; /* LPDDR4 interface */ 509 apple,always-on; /* LPDDR4 interface */ 519 apple,always-on; /* LPDDR4 interface */
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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ |
D | rockchip,rk3399-dmc.yaml | 91 srpd_lite_idle * 1024 DFI clock cycles. This parameter is for LPDDR4 225 When the DRAM type is LPDDR4, this parameter defines the ODT disable 233 When the DRAM type is LPDDR4, this parameter defines the DRAM side drive 241 When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on 249 When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on 257 When the DRAM type is LPDDR4, this parameter defines the PHY side CA line 265 When the DRAM type is LPDDR4, this parameter defines the PHY side clock 273 When the DRAM type is LPDDR4, this parameter defines the PHY side DQ line 281 When the DRAM type is LPDDR4, this parameter defines the PHY side ODT 308 srpd_lite_idle nanoseconds. This parameter is for LPDDR4 only.
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D | xlnx,versal-ddrmc-edac.yaml | 14 The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/
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D | nvidia,tegra186-mc.yaml | 15 into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
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/linux-6.15/tools/perf/pmu-events/arch/arm64/freescale/imx91/sys/ |
D | metrics.json | 3 "BriefDescription": "bandwidth usage for lpddr4 evk board", 4 "MetricName": "imx91_bandwidth_usage.lpddr4",
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/linux-6.15/Documentation/devicetree/bindings/soc/renesas/ |
D | renesas,rzv2m-pwc.yaml | 13 - on/off signal generation for the LPDDR4 core power supply (LPVDD)
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/linux-6.15/Documentation/devicetree/bindings/regulator/ |
D | renesas,raa215300.yaml | 15 and LPDDR4 memory power requirements. The internally compensated regulators,
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/linux-6.15/arch/arm64/boot/dts/freescale/ |
D | imx8mm-evkb.dts | 75 /* NVCC_DRAM for LPDDR4 */
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D | imx93-tqma9352.dtsi | 113 /* V_DDRQ - 1.1 LPDDR4 or 0.6 LPDDR4X */
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/linux-6.15/drivers/memory/ |
D | brcmstb_memc.c | 94 * Cannot change the inactivity timeout on LPDDR4 chips because the in srpd_store()
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/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | sdm660-xiaomi-lavender.dts | 323 /* This gives power to the LPDDR4: never turn it off! */
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D | sda660-inforce-ifc6560.dts | 330 /* This gives power to the LPDDR4: never turn it off! */
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/linux-6.15/drivers/memory/tegra/ |
D | tegra210-emc-cc-r21021.c | 980 * LPDDR4 section A. in tegra210_emc_r21021_set_clock() 1001 * LPDDR4 and DDR3 common section. in tegra210_emc_r21021_set_clock() 1232 * LPDDR4 Conditional Training Kickoff. Removed. in tegra210_emc_r21021_set_clock()
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/linux-6.15/drivers/i2c/ |
D | i2c-smbus.c | 435 case 0x1E: /* LPDDR4 */ in i2c_register_spd()
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/linux-6.15/drivers/gpu/drm/i915/soc/ |
D | intel_dram.c | 35 DRAM_TYPE_STR(LPDDR4), in intel_dram_type_str()
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