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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ddr/
Djedec,lpddr4.yaml4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
7 title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
18 - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"
19 - const: jedec,lpddr4
31 compatible = "lpddr4-ff,0100", "jedec,lpddr4";
Djedec,lpddr-channel.yaml23 - jedec,lpddr4-channel
85 const: jedec,lpddr4-channel
89 $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
128 compatible = "jedec,lpddr4-channel";
132 compatible = "lpddr4-05,0301", "jedec,lpddr4";
140 compatible = "lpddr4-05,0301", "jedec,lpddr4";
/linux-6.15/arch/arm64/boot/dts/apple/
Ds8001-j98a-j99a.dtsi13 apple,always-on; /* LPDDR4 interface */
17 apple,always-on; /* LPDDR4 interface */
21 apple,always-on; /* LPDDR4 interface */
25 apple,always-on; /* LPDDR4 interface */
Dt8011-pro2.dtsi45 apple,always-on; /* LPDDR4 interface */
49 apple,always-on; /* LPDDR4 interface */
Dt8011-pmgr.dtsi500 apple,always-on; /* LPDDR4 interface */
509 apple,always-on; /* LPDDR4 interface */
518 apple,always-on; /* LPDDR4 interface */
527 apple,always-on; /* LPDDR4 interface */
536 apple,always-on; /* LPDDR4 interface */
545 apple,always-on; /* LPDDR4 interface */
Dt8103-pmgr.dtsi576 apple,always-on; /* LPDDR4 interface */
585 apple,always-on; /* LPDDR4 interface */
594 apple,always-on; /* LPDDR4 interface */
603 apple,always-on; /* LPDDR4 interface */
744 apple,always-on; /* LPDDR4 interface */
753 apple,always-on; /* LPDDR4 interface */
762 apple,always-on; /* LPDDR4 interface */
771 apple,always-on; /* LPDDR4 interface */
Dt8112-pmgr.dtsi530 apple,always-on; /* LPDDR4 interface */
539 apple,always-on; /* LPDDR4 interface */
548 apple,always-on; /* LPDDR4 interface */
557 apple,always-on; /* LPDDR4 interface */
566 apple,always-on; /* LPDDR4 interface */
575 apple,always-on; /* LPDDR4 interface */
584 apple,always-on; /* LPDDR4 interface */
593 apple,always-on; /* LPDDR4 interface */
Dt8010-pmgr.dtsi498 apple,always-on; /* LPDDR4 interface */
507 apple,always-on; /* LPDDR4 interface */
516 apple,always-on; /* LPDDR4 interface */
525 apple,always-on; /* LPDDR4 interface */
Ds8001-pmgr.dtsi449 apple,always-on; /* LPDDR4 interface */
458 apple,always-on; /* LPDDR4 interface */
467 apple,always-on; /* LPDDR4 interface */
476 apple,always-on; /* LPDDR4 interface */
Ds800-0-3-pmgr.dtsi491 apple,always-on; /* LPDDR4 interface */
500 apple,always-on; /* LPDDR4 interface */
509 apple,always-on; /* LPDDR4 interface */
518 apple,always-on; /* LPDDR4 interface */
Dt8012-pmgr.dtsi490 apple,always-on; /* LPDDR4 interface */
499 apple,always-on; /* LPDDR4 interface */
509 apple,always-on; /* LPDDR4 interface */
519 apple,always-on; /* LPDDR4 interface */
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/
Drockchip,rk3399-dmc.yaml91 srpd_lite_idle * 1024 DFI clock cycles. This parameter is for LPDDR4
225 When the DRAM type is LPDDR4, this parameter defines the ODT disable
233 When the DRAM type is LPDDR4, this parameter defines the DRAM side drive
241 When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on
249 When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on
257 When the DRAM type is LPDDR4, this parameter defines the PHY side CA line
265 When the DRAM type is LPDDR4, this parameter defines the PHY side clock
273 When the DRAM type is LPDDR4, this parameter defines the PHY side DQ line
281 When the DRAM type is LPDDR4, this parameter defines the PHY side ODT
308 srpd_lite_idle nanoseconds. This parameter is for LPDDR4 only.
Dxlnx,versal-ddrmc-edac.yaml14 The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/
Dnvidia,tegra186-mc.yaml15 into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
/linux-6.15/tools/perf/pmu-events/arch/arm64/freescale/imx91/sys/
Dmetrics.json3 "BriefDescription": "bandwidth usage for lpddr4 evk board",
4 "MetricName": "imx91_bandwidth_usage.lpddr4",
/linux-6.15/Documentation/devicetree/bindings/soc/renesas/
Drenesas,rzv2m-pwc.yaml13 - on/off signal generation for the LPDDR4 core power supply (LPVDD)
/linux-6.15/Documentation/devicetree/bindings/regulator/
Drenesas,raa215300.yaml15 and LPDDR4 memory power requirements. The internally compensated regulators,
/linux-6.15/arch/arm64/boot/dts/freescale/
Dimx8mm-evkb.dts75 /* NVCC_DRAM for LPDDR4 */
Dimx93-tqma9352.dtsi113 /* V_DDRQ - 1.1 LPDDR4 or 0.6 LPDDR4X */
/linux-6.15/drivers/memory/
Dbrcmstb_memc.c94 * Cannot change the inactivity timeout on LPDDR4 chips because the in srpd_store()
/linux-6.15/arch/arm64/boot/dts/qcom/
Dsdm660-xiaomi-lavender.dts323 /* This gives power to the LPDDR4: never turn it off! */
Dsda660-inforce-ifc6560.dts330 /* This gives power to the LPDDR4: never turn it off! */
/linux-6.15/drivers/memory/tegra/
Dtegra210-emc-cc-r21021.c980 * LPDDR4 section A. in tegra210_emc_r21021_set_clock()
1001 * LPDDR4 and DDR3 common section. in tegra210_emc_r21021_set_clock()
1232 * LPDDR4 Conditional Training Kickoff. Removed. in tegra210_emc_r21021_set_clock()
/linux-6.15/drivers/i2c/
Di2c-smbus.c435 case 0x1E: /* LPDDR4 */ in i2c_register_spd()
/linux-6.15/drivers/gpu/drm/i915/soc/
Dintel_dram.c35 DRAM_TYPE_STR(LPDDR4), in intel_dram_type_str()

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