Searched +full:lpc3220 +full:- +full:sic (Results 1 – 3 of 3) sorted by relevance
| /linux-6.15/Documentation/devicetree/bindings/interrupt-controller/ |
| D | nxp,lpc3220-mic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Zapolskiy <vz@mleia.com>
15 - nxp,lpc3220-mic
16 - nxp,lpc3220-sic
21 interrupt-controller: true
23 '#interrupt-cells':
28 - description: Regular interrupt request
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| /linux-6.15/arch/arm/boot/dts/nxp/lpc/ |
| D | lpc32xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "nxp,lpc3220";
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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| /linux-6.15/drivers/irqchip/ |
| D | irq-lpc32xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015-2016 Vladimir Zapolskiy <vz@mleia.com>
37 return readl_relaxed(ic->base + reg); in lpc32xx_ic_read()
43 writel_relaxed(val, ic->base + reg); in lpc32xx_ic_write()
49 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_mask()
58 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_unmask()
67 u32 mask = BIT(d->hwirq); in lpc32xx_irq_ack()
75 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_set_type()
97 return -EINVAL; in lpc32xx_irq_set_type()
127 seq_printf(p, "%08x.mic", ic->addr); in lpc32xx_irq_print_chip()
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