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/qemu/hw/timer/
H A Dcmsdk-apb-dualtimer.c169 uint32_t load; in cmsdk_dualtimermod_write_control() local
171 /* Periodic: the limit is the LOAD register value */ in cmsdk_dualtimermod_write_control()
172 load = m->load; in cmsdk_dualtimermod_write_control()
175 load = ptimer_get_limit(m->timer); in cmsdk_dualtimermod_write_control()
177 load = deposit32(m->load, 0, 16, load); in cmsdk_dualtimermod_write_control()
179 m->load = load; in cmsdk_dualtimermod_write_control()
180 load = 0xffffffff; in cmsdk_dualtimermod_write_control()
183 load &= 0xffff; in cmsdk_dualtimermod_write_control()
185 ptimer_set_limit(m->timer, load, 0); in cmsdk_dualtimermod_write_control()
190 uint32_t value, load; in cmsdk_dualtimermod_write_control() local
[all …]
/qemu/include/hw/
H A Dloader.h15 * load_image_size: load an image file into specified buffer
17 * @addr: Buffer to load image into
20 * Load an image file from disk into the specified buffer.
34 * @addr: Address to load the image to
35 * @max_sz: The maximum size of the image to load
36 * @as: The AddressSpace to load the ELF to. The value of address_space_memory
39 * Load a fixed image into memory.
49 * @as: The AddressSpace to load the .hex file to. The value of
52 * Load a fixed .hex file into memory.
67 * load_image_mr: load an image into a memory region
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/qemu/docs/devel/migration/
H A Dvirtio.rst66 Load state procedure
74 load() function registered
79 - load proxy device
80 - load transport-specific
82 - load common device
84 - load common virtqueue
87 - load transport-specific
91 - load device-specific
93 - load subsections
107 Devices need to be careful in their state processing during load: The
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/qemu/target/sparc/
H A Dasi.h163 #define ASI_TWINX_AIUP 0x22 /* twin load, primary user */
164 #define ASI_TWINX_AIUS 0x23 /* twin load, secondary user */
165 #define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load,
168 #define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cacheable, qword load */
170 #define ASI_TWINX_REAL 0x26 /* twin load, real, cacheable */
171 #define ASI_QUAD_LDD_PHYS_4V 0x26 /* (4V) Physical, qword load */
172 #define ASI_TWINX_N 0x27 /* twin load, nucleus */
173 #define ASI_TWINX_AIUP_L 0x2a /* twin load, primary user, LE */
174 #define ASI_TWINX_AIUS_L 0x2b /* twin load, secondary user, LE */
175 #define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cacheable, qword load, l-endian */
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/qemu/linux-user/arm/
H A Dvdso.ld24 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
38 .note : { *(.note*) } :load :note
39 .dynamic : { *(.dynamic) } :load :dynamic
40 .dynsym : { *(.dynsym) } :load
63 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
64 .eh_frame : { *(.eh_frame) } :load
66 .text : { *(.text*) } :load
/qemu/linux-user/x86_64/
H A Dvdso.ld30 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
44 .note : { *(.note*) } :load :note
45 .dynamic : { *(.dynamic) } :load :dynamic
46 .dynsym : { *(.dynsym) } :load
69 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
70 .eh_frame : { *(.eh_frame) } :load
72 .text : { *(.text*) } :load =0x90909090
/qemu/linux-user/ppc/
H A Dvdso-32.ld27 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
41 .note : { *(.note*) } :load :note
42 .dynamic : { *(.dynamic) } :load :dynamic
43 .dynsym : { *(.dynsym) } :load
66 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
67 .eh_frame : { *(.eh_frame) } :load
69 .text : { *(.text*) } :load
H A Dvdso-64.ld25 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
39 .note : { *(.note*) } :load :note
40 .dynamic : { *(.dynamic) } :load :dynamic
41 .dynsym : { *(.dynsym) } :load
64 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
65 .eh_frame : { *(.eh_frame) } :load
67 .text : { *(.text*) } :load
/qemu/hw/ppc/
H A Dspapr_nested.c235 static void nested_load_state(PowerPCCPU *cpu, struct nested_ppc_state *load) in nested_load_state() argument
240 memcpy(env->gpr, load->gpr, sizeof(env->gpr)); in nested_load_state()
242 env->lr = load->lr; in nested_load_state()
243 env->ctr = load->ctr; in nested_load_state()
244 env->cfar = load->cfar; in nested_load_state()
245 env->msr = load->msr; in nested_load_state()
246 env->nip = load->nip; in nested_load_state()
248 ppc_set_cr(env, load->cr); in nested_load_state()
249 cpu_write_xer(env, load->xer); in nested_load_state()
251 env->spr[SPR_LPCR] = load->lpcr; in nested_load_state()
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/qemu/linux-user/aarch64/
H A Dvdso.ld24 load PT_LOAD FLAGS(7) FILEHDR PHDRS;
43 .note : { *(.note*) } :load :note
44 .dynamic : { *(.dynamic) } :load :dynamic
45 .dynsym : { *(.dynsym) } :load
68 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
69 .eh_frame : { *(.eh_frame) } :load
71 .text : { *(.text*) } :load =0xd503201f
/qemu/linux-user/riscv/
H A Dvdso.ld26 load PT_LOAD FLAGS(7) FILEHDR PHDRS;
45 .note : { *(.note*) } :load :note
46 .dynamic : { *(.dynamic) } :load :dynamic
47 .dynsym : { *(.dynsym) } :load
70 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
71 .eh_frame : { *(.eh_frame) } :load
73 .text : { *(.text*) } :load =0xd503201f
/qemu/linux-user/i386/
H A Dvdso.ld33 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
47 .note : { *(.note*) } :load :note
48 .dynamic : { *(.dynamic) } :load :dynamic
49 .dynsym : { *(.dynsym) } :load
72 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
73 .eh_frame : { *(.eh_frame) } :load
75 .text : { *(.text*) } :load =0x90909090
/qemu/linux-user/s390x/
H A Dvdso.ld29 load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
43 .note : { *(.note*) } :load :note
44 .dynamic : { *(.dynamic) } :load :dynamic
45 .dynsym : { *(.dynsym) } :load
68 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
69 .eh_frame : { *(.eh_frame) } :load
71 .text : { *(.text*) } :load
/qemu/linux-user/loongarch64/
H A Dvdso.ld25 load PT_LOAD FLAGS(7) FILEHDR PHDRS;
44 .note : { *(.note*) } :load :note
45 .dynamic : { *(.dynamic) } :load :dynamic
46 .dynsym : { *(.dynsym) } :load
69 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
70 .eh_frame : { *(.eh_frame) } :load
72 .text : { *(.text*) } :load =0xd503201f
/qemu/scripts/kvm/
H A Dvmxcap147 15: 'CR3-load exiting',
150 19: 'CR8-load exiting',
214 12: 'Load IA32_PERF_GLOBAL_CTRL',
217 19: 'Load IA32_PAT',
219 21: 'Load IA32_EFER',
234 1: 'Load IA32 FRED MSRs',
242 2: 'Load debug controls',
246 13: 'Load IA32_PERF_GLOBAL_CTRL',
247 14: 'Load IA32_PAT',
248 15: 'Load IA32_EFER',
[all …]
/qemu/linux-user/hppa/
H A Dvdso.ld38 load PT_LOAD FLAGS(7) FILEHDR PHDRS;
50 .note : { *(.note*) } :load :note
51 .dynamic : { *(.dynamic) } :load :dynamic
52 .dynsym : { *(.dynsym) } :load
73 .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
74 .eh_frame : { *(.eh_frame) } :load
76 .text : { *(.text*) } :load
/qemu/crypto/
H A Dtrace-events4 qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%…
8 qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s"
11 qcrypto_tls_creds_psk_load(void *creds, const char *dir) "TLS creds psk load creds=%p dir=%s"
14 qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s"
18 qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load …
19 qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list…
/qemu/include/hw/arm/
H A Dboot.h27 * @kernel_filename: file to load
28 * @mem_base: base address to load image at (should be where the
30 * @mem_size: mem_size: maximum image size to load
32 * Load the guest image for an ARMv7M system. This must be called by
49 /* If set to True, arm_load_kernel() will not load DTB.
50 * It allows board to load DTB manually later.
136 /* CPU having load the kernel and that should be the first to boot. */
161 * arm_load_dtb() - load a device tree binary image into memory
162 * @addr: the address to load the image at
165 * @as: address space to load image to
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/qemu/target/hexagon/imported/
H A Dldst.idef19 * Load and Store instruction definitions
22 /* The set of addressing modes standard to all Load instructions */
33 /* The set of 32-bit load instructions */
34 STD_LD_AMODES(loadrub,"Rd32=memub","Load Unsigned Byte",ATTRIBS(A_MEMSIZE_1B,A_LOAD,A_REGWRSIZE_1B)…
35 STD_LD_AMODES(loadrb, "Rd32=memb", "Load signed Byte",ATTRIBS(A_MEMSIZE_1B,A_LOAD),"0",fLOAD(1,1,s,…
36 STD_LD_AMODES(loadruh,"Rd32=memuh","Load unsigned Half integer",ATTRIBS(A_REGWRSIZE_2B,A_MEMSIZE_2B…
37 STD_LD_AMODES(loadrh, "Rd32=memh", "Load signed Half integer",ATTRIBS(A_REGWRSIZE_2B,A_MEMSIZE_2B,A…
38 STD_LD_AMODES(loadri, "Rd32=memw", "Load Word",ATTRIBS(A_REGWRSIZE_4B,A_MEMSIZE_4B,A_LOAD),"2",fLOA…
39 STD_LD_AMODES(loadrd, "Rdd32=memd","Load Double integer",ATTRIBS(A_REGWRSIZE_8B,A_MEMSIZE_8B,A_LOAD…
41 /* These instructions do a load an unpack */
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/qemu/target/arm/tcg/
H A Dneon-ls.decode1 # AArch32 Neon load/store instruction descriptions
22 # Encodings for Neon load/store instructions where the T32 encoding
33 # Neon load/store multiple structures
38 # Neon load single element to all lanes
43 # Neon load/store single structure to one lane
H A Dsme-fa64.decode49 FAIL 0-00 110- ---- ---- ---- ---- ---- ---- # Advanced SIMD structure load/store
56 # --10 110- ---- ---- ---- ---- ---- ---- # Load/store pair of FP registers
57 # --01 1100 ---- ---- ---- ---- ---- ---- # Load FP register (PC-relative literal)
58 # --11 1100 --0- ---- ---- ---- ---- ---- # Load/store FP register (unscaled imm)
59 # --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
60 # --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
/qemu/docs/devel/
H A Dloads-stores.rst6 Load and Store APIs
27 load: ``ld{sign}{size}_{endian}_p(ptr)``
55 load: ``ldn{endian}_p(ptr, sz)``
57 which performs an unsigned load of ``sz`` bytes from ``ptr``
108 load: ``cpu_ld{size}{end}_mmu(env, ptr, oi, retaddr)``
137 load: ``cpu_ld{sign}{size}{end}_mmuidx_ra(env, ptr, mmuidx, retaddr)``
175 load: ``cpu_ld{sign}{size}{end}_data_ra(env, ptr, ra)``
214 load: ``cpu_ld{sign}{size}{end}_data(env, ptr)``
255 load: ``cpu_ld{sign}{size}_code(env, ptr)``
284 load: ``translator_ld{sign}{size}(env, ptr)``
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/qemu/docs/system/
H A Dtls.rst67 --load-privkey ca-key.pem \
126 --load-ca-certificate ca-cert.pem \
127 --load-ca-privkey ca-key.pem \
128 --load-privkey server-hostNNN-key.pem \
179 --load-ca-certificate ca-cert.pem \
180 --load-ca-privkey ca-key.pem \
181 --load-privkey client-hostNNN-key.pem \
230 --load-ca-certificate ca-cert.pem \
231 --load-ca-privkey ca-key.pem \
232 --load-privkey both-hostNNN-key.pem \
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/qemu/tests/qemu-iotests/
H A Dcommon.tls121 --load-privkey "${tls_dir}/key.pem" \
150 --load-ca-privkey "${tls_dir}/key.pem" \
151 --load-ca-certificate "${tls_dir}/$caname-cert.pem" \
152 --load-privkey "${tls_dir}/key.pem" \
181 --load-ca-privkey "${tls_dir}/key.pem" \
182 --load-ca-certificate "${tls_dir}/$caname-cert.pem" \
183 --load-privkey "${tls_dir}/key.pem" \
/qemu/tests/tcg/multiarch/
H A Dtest-plugin-mem-access.c8 * 8,16,32 load/store are tested for all arch.
9 * 64,128 load/store are tested for aarch64/x64.
51 PRINT_EXPECTED(atomic_op_##name, type, "0x0*42", "load"); \
66 PRINT_EXPECTED(load_##name, type, #value, "load"); \
72 /* volatile forces load to be generated. */ \
112 "0xf122334455667788f123456789abcdef", "load"); in print_expected_load_u128()

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