Searched +full:kpss +full:- +full:gcc +full:- +full:mdm9615 (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)10 - Christian Marangi <ansuelsmth@gmail.com>13 Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used15 to the kpss-gcc registers.20 - enum:21 - qcom,kpss-gcc-ipq8064[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT3 * Device Tree Source for Qualcomm MDM9615 SoC9 /dts-v1/;11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>15 #include <dt-bindings/mfd/qcom-rpm.h>16 #include <dt-bindings/soc/qcom,gsbi.h>19 #address-cells = <1>;[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o4 clk-qcom-y += common.o5 clk-qcom-y += clk-regmap.o6 clk-qcom-y += clk-alpha-pll.o7 clk-qcom-y += clk-pll.o8 clk-qcom-y += clk-rcg.o9 clk-qcom-y += clk-rcg2.o10 clk-qcom-y += clk-branch.o11 clk-qcom-y += clk-regmap-divider.o[all …]
1 # SPDX-License-Identifier: GPL-2.0-only286 tristate "MDM9615 Global Clock Controller"289 Support for the global clock controller on mdm9615 devices.1145 tristate "High-Frequency PLL (HFPLL) Clock Controller"1147 Support for the high-frequency PLLs present on Qualcomm devices.1152 tristate "KPSS Clock Controller"1154 Support for the Krait ACC and GCC clock controllers. Say Y