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/qemu/docs/devel/
H A Dreset.rst21 to control it. All resettable control functions must be called while holding
26 instantly reset an object, without keeping it in reset state, just call
33 Cold reset is supported by every resettable object. In QEMU, it means we reset
35 from what is a real hardware cold reset. It differs from other resets (like
59 This is only used for S390 CPU objects; it clears interrupts, stops
63 This is only used for S390 CPU objects; it does everything
65 FPC, timer and control registers. It does not touch gprs, fprs or acrs.
72 ``resettable_assert_reset()`` then ``resettable_release_reset()``. It is
78 maintaining a count of in-progress resets; it is crucial to call
87 parameter. Still, it is a programming error to call a resettable function on a
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H A Dwriting-monitor-commands.rst7 This document doesn't discuss QMP protocol level details, nor does it dive
29 1. Define the command and any types it needs in the appropriate QAPI
33 the command should be exported by some QEMU subsystem. But it can also be
39 done if it does make sense to have the functionality in HMP. The HMP command
101 command carries some meaningful action in QEMU but here it will just print
104 Our command will be called "hello-world". It takes no arguments, nor does it
118 The "command" keyword defines a new QMP command. It instructs QAPI to
123 earlier, it's preferable for commands to live in QEMU subsystems. But
137 3. It takes an "Error \*\*" argument. This is required. Later we will see how to
141 5. Printing to the terminal is discouraged for QMP commands, we do it here
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H A Dstyle.rst41 * It is the QEMU coding style.
93 Sometimes it is hard to do, especially when dealing with QEMU subsystems
95 is obviously less readable and more awkward, prefer not to wrap it; better
106 let them keep doing it.
111 * It is the QEMU coding style.
146 However, if there is an obvious subsystem-specific prefix it should be
161 pre-processor. Another common suffix is ``_impl``; it is used for the
189 and clarity it comes on a line by itself:
200 Furthermore, it is the QEMU coding style.
207 of blocks. To avoid accidental re-use it is permissible to declare
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H A Drust.rst9 Right now, the focus is on making it possible to write devices that inherit
10 from ``SysBusDevice`` in `*safe*`__ Rust. Later, it may become possible
31 * it is also possible to use ``cargo`` for common Rust-specific coding
35 generated sources from QEMU's build directory and puts it in Cargo's
37 of Cargo will complain that it cannot find the generated sources,
91 crate, which is planned for inclusion in QEMU, but it can be easily patched
97 it is hard to place the ``VMStateField`` definitions in traits.
100 inclusion as ``#![feature(location_file_nul)]``, but it will be a while
106 replaces it.
150 - *initial*: the API is in its initial stages; it requires large amount of
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/qemu/include/hw/
H A Dptimer.h16 * ptimer_get_count() and ptimer_set_count()). When it is enabled
19 * When it reaches zero it will trigger a callback function, and
26 * When ptimer_transaction_commit() is called it will evaluate the state
31 * Forgetting to set the period/frequency (or setting it to zero) is a
39 * It has several weird behaviours which don't match typical hardware
46 * consider updating it to specify the right policy flags.
55 * - Starting to run with counter = 0 or setting it to "0" while timer
90 * (though it will cause a reload). Only a counter decrement to "0"
119 * is called it will evaluate the state of the timer after all the
147 * It is an error to call this function for a BH-based ptimer;
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/qemu/migration/
H A Dpage_cache.c133 CacheItem *it; in cache_is_cached() local
135 it = cache_get_by_addr(cache, addr); in cache_is_cached()
137 if (it->it_addr == addr) { in cache_is_cached()
139 it->it_age = current_age; in cache_is_cached()
149 CacheItem *it; in cache_insert() local
152 it = cache_get_by_addr(cache, addr); in cache_insert()
154 if (it->it_data && it->it_addr != addr && in cache_insert()
155 it->it_age + CACHED_PAGE_LIFETIME > current_age) { in cache_insert()
156 /* the cache page is fresh, don't replace it */ in cache_insert()
160 if (!it->it_data) { in cache_insert()
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/qemu/linux-headers/LICENSES/preferred/
H A DGPL-2.026 of this license document, but changing it is not allowed.
31 freedom to share and change it. By contrast, the GNU General Public
36 using it. (Some other Free Software Foundation software is covered by
37 the GNU Library General Public License instead.) You can apply it to
43 this service if you wish), that you receive source code or can get it
44 if you want it, that you can change the software or use pieces of it
50 distribute copies of the software, or if you modify it.
72 program proprietary. To prevent this, we have made it clear that any
82 a notice placed by the copyright holder saying it may be distributed
86 that is to say, a work containing the Program or a portion of it,
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/qemu/
H A DCOPYING7 of this license document, but changing it is not allowed.
12 freedom to share and change it. By contrast, the GNU General Public
17 using it. (Some other Free Software Foundation software is covered by
18 the GNU Lesser General Public License instead.) You can apply it to
24 this service if you wish), that you receive source code or can get it
25 if you want it, that you can change the software or use pieces of it
31 distribute copies of the software, or if you modify it.
53 program proprietary. To prevent this, we have made it clear that any
63 a notice placed by the copyright holder saying it may be distributed
67 that is to say, a work containing the Program or a portion of it,
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/qemu/rust/qemu-api-macros/src/
H A Dbits.rs37 it: &mut dyn Iterator<Item = TokenTree>, in parse_primary()
62 it.next() in parse_primary()
73 it.next() in parse_primary()
79 let Some(rhs_tok) = it.next() else { in parse_primary()
85 let next = self.parse_primary(rhs_tok, it, out)?; in parse_primary()
106 it: &mut dyn Iterator<Item = TokenTree>, in parse_binop()
112 let mut next = f(self, tok, it, out)?; in parse_binop()
120 let Some(rhs_tok) = it.next() else { in parse_binop()
127 next = f(self, rhs_tok, it, &mut rhs)?; in parse_binop()
137 it: &mut dyn Iterator<Item = TokenTree>, in parse_sub()
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/qemu/docs/system/i386/
H A Dhyperv.rst11 It may, however, be hard-to-impossible to add support for these interfaces to
41 This feature tells guest OS to disable watchdog timeouts as it is running on a
42 hypervisor. It is known that some Windows versions will do this even when they
46 Provides so-called VP Assist page MSR to guest allowing it to work with APIC
65 idea of how much time was 'stolen' from it (when the virtual CPU was preempted
71 by the guest when it crashes, HV_X64_MSR_CRASH_P0..HV_X64_MSR_CRASH_P5 MSRs
100 periodic mode. It is known that certain Windows versions revert to using HPET
127 to the specification, guests shouldn't use this information and it is unknown
133 Provides HV_X64_MSR_RESET (0x40000003) MSR to the guest allowing it to reset
134 itself by writing to it. Even when this MSR is enabled, it is not a recommended
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/qemu/include/qapi/
H A Derror.h21 * parameter. It should be the last parameter, except for functions
31 * function should not examine it.
33 * - The function may pass @errp to functions it calls to pass on
34 * their errors to its caller. If it dereferences @errp to check
35 * for errors, it must use ERRP_GUARD().
37 * - On success, the function should not touch *errp. On failure, it
104 * Handle an error without reporting it (just for completeness):
107 * Assert that an expected error occurred, but clean it up without
108 * reporting it (primarily useful in testsuites):
116 * Create a new error and pass it to the caller:
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/qemu/docs/devel/migration/
H A Dcompatibility.rst43 This have to work, and if it doesn't work it is a bug.
60 It needs to use the definition of pc-5.1 and the devices as they
70 Now it comes the interesting ones, when both QEMU processes are
80 qemu-5.1 to understand whatever qemu-5.2 decides to change, so it is
98 pc-5.1, it needs to **not** use the feature, to be able to migrate to
102 qemu-5.2 has to expect that it is not going to get data for the new
103 feature, because qemu-5.1 doesn't know about it.
110 that array to see what value it needs to get for that feature. And
115 macros that exist. With it, we set the default value for that
116 property, and that is what it is going to get in the latest released
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/qemu/tests/tcg/s390x/
H A Dfma.c159 static bool iter_next(struct iter *it) in iter_next() argument
164 if (++it->val[i] != signed_floats[it->fmt][it->cls[i]].n) { in iter_next()
167 it->val[i] = 0; in iter_next()
169 if (++it->cls[i] != N_SIGNED_CLASSES) { in iter_next()
172 it->cls[i] = 0; in iter_next()
175 return ++it->fmt != N_FORMATS; in iter_next()
181 struct iter it = {}; in main() local
184 size_t n = float_sizes[it.fmt]; in main()
188 memcpy(&a, signed_floats[it.fmt][it.cls[0]].v[it.val[0]], sizeof(a)); in main()
189 memcpy(&b, signed_floats[it.fmt][it.cls[1]].v[it.val[1]], sizeof(b)); in main()
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/qemu/docs/
H A Dglossary.rst13 A specific API used to accelerate execution of guest instructions. It can be
44 QEMU is able to emulate a CPU, and all the hardware interacting with it,
46 using a hardware-based accelerator, it is responsible for emulating, using
59 QEMU implements a `gdb server <GDB usage>`, allowing gdb to attach to it and
67 are using through the codebase. It provides many data structures, macros, string
68 and thread utilities and portable functions across different OS. It's required
75 machines. It provides various services to help QEMU to interact with it.
105 Xen as well). For MacOS, it's HVF. Windows defines WHPX. And NetBSD provides
115 RAM, one or more CPUs, and various devices. It can be selected with the option
148 "softmmu" precisely because it implements this in software, including a TLB
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H A Dimage-fuzzer.txt5 # This program is free software: you can redistribute it and/or modify
6 # it under the terms of the GNU General Public License as published by
10 # This program is distributed in the hope that it will be useful,
49 The runner activates generation of core dumps during test executions, but it
57 ``qemu-img`` is required for creation of backing files, so it's mandatory to set
58 the related environment variable if it's not installed in the system path.
107 'fuzz.py' contains all fuzzing functions, one per image field. It's assumed
117 If a fuzzer configuration is specified, then it has the next interpretation:
143 method that creates a test image, writes it to the specified file and returns
145 The file should be created if it doesn't exist or overwritten otherwise.
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/qemu/include/hw/nvram/
H A Deeprom_at24c.h14 * @bus: I2C bus to put it on
18 * Create the device state structure, initialize it, put it on the specified
19 * @bus, and drop the reference to it (the device is realized).
26 * @bus: I2C bus to put it on
32 * Create the device state structure, initialize it, put it on the specified
33 * @bus, and drop the reference to it (the device is realized). Copies the data
/qemu/target/ppc/translate/
H A Dmisc-impl.c.inc6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
11 * This library is distributed in the hope that it will be useful,
32 * 440, where it an execution serialisation point that requires all
46 * In ISA v3.1, the L field grew one bit. Mask that out to ignore it in
47 * older processors. It also added the SC field, zero this to ignore
48 * it too.
101 * eieio has complex semanitcs. It provides memory ordering between
107 * It separately also orders memory for operations in the set:
110 * It also serializes instructions:
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/qemu/tests/qemu-iotests/
H A D1828 # This program is free software; you can redistribute it and/or modify
9 # it under the terms of the GNU General Public License as published by
13 # This program is distributed in the hope that it will be useful,
70 # This tests that reopening does not unshare any permissions it should
73 # permissions it was supposed to share)
82 # it, so that is fine)
96 # It should still keep all permissions shared.
135 # reopening node0 unshared any (which it should not have), this will
136 # fail (but it should not).
159 # When quitting qemu, it will try to drop its locks on the test image.
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/qemu/tcg/tci/
H A DREADME16 interpreter for the generated bytecode, it is possible to
39 If configure is called without --enable-tcg-interpreter, it will
40 suggest using this option. Setting it automatically would need
49 should be speed. Especially during development of TCI, it was very
56 registers or additional opcodes (it is easy to modify the virtual machine).
57 It can also be used to verify native TCGs.
103 * TCI is not widely tested. It was written and tested on a x86_64 host
106 A cross compiled QEMU for mipsel host works, too. It is terribly slow
107 because I run it in a mips malta emulation, so it is an interpreted
115 in the interpreter. These opcodes raise a runtime exception, so it is
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/qemu/docs/specs/
H A Divshmem-spec.rst8 shared memory area, it is modeled by QEMU as a PCI device exposing
11 The device can use a shared memory object on the host directly, or it
24 QEMU 2.6.0, it had revision 0.
38 you have access to the shared memory in the guest and can use it as
47 configured for interrupts. It becomes safely accessible only after
54 it is configured for interrupts.
87 is received. Reading the register clears it.
90 this is zero. Else, it is the device's ID (between 0 and 65535).
109 If the peer with the requested ID isn't connected, or it has fewer
167 production. It assumes all clients use the same number of interrupt
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/qemu/include/hw/ssi/
H A Dssi.h6 * However it is fairly common for boards to have multiple peripherals
9 * It is assumed that master and peripheral are both using the same transfer
86 * @bus: SSI bus to put it on
89 * Call 'realize' on @dev, put it on the specified @bus, and drop the
90 * reference to it. Errors are reported via @errp and by returning
94 * (which takes a reference to the device it returns to you), so that
95 * you can set properties on it before realizing it. If you don't need
96 * to set properties then ssi_create_peripheral() is probably better (as it
100 * initialized it via some variant on object_initialize_child() then
106 * any code that wanted it.)
/qemu/include/qemu/
H A Djob.h56 * The coroutine that executes the job. If not NULL, it is reentered when
83 * It can only be written when we hold *both* BQL
120 * Set to true by the job while it is in a quiescent state, where
134 * to true. After a job has been cancelled, it should only yield
157 * If job->ret is nonzero and an error object was not set, it will be set
209 * If this callback returns nonzero, the job transaction it is part of is
210 * aborted. If it returns zero, the job moves into the WAITING state. If it
226 * If the callback is not NULL, it will be invoked when the job transitions
233 * If the callback is not NULL, it will be invoked when the job transitions
261 * if it is not in a transaction.
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/qemu/include/hw/i2c/
H A Di2c.h8 immediately. It does not support slave devices that need to be able to
50 * true if it matches (or broadcast), and updates the device list, false
170 * @bus: I2C bus to put it on
174 * Create the device state structure, initialize it, put it on the
175 * specified @bus, and drop the reference to it (the device is realized).
182 * @bus: I2C bus to put it on
188 * Call 'realize' on @dev, put it on the specified @bus, and drop the
189 * reference to it.
193 * the device it returns to you), so that you can set properties on it
194 * before realizing it. If you don't need to set properties then
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/qemu/include/block/
H A Dgraph-lock.h7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
12 * This library is distributed in the hope that it will be useful,
36 * The writer (main loop) has an "exclusive" access, so it first waits for
38 * entering while it has the exclusive access.
42 * In case it is, they go in a CoQueue and sleep until the writer
50 * This also means that when an AioContext is deleted it may have a nonzero
126 * the graph, therefore it can't happen while another thread is
127 * modifying it.
129 * and if has_writer is set, it means that the writer is modifying
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/qemu/tests/tcg/hexagon/
H A Dsignal_context.c4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
9 * This program is distributed in the hope that it will be useful,
37 struct itimerspec it; in main() local
49 it.it_interval.tv_sec = 0; in main()
50 it.it_interval.tv_nsec = 100000; in main()
51 it.it_value.tv_sec = 0; in main()
52 it.it_value.tv_nsec = 100000; in main()
53 timer_settime(tid, 0, &it, NULL); in main()

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