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/qemu/include/exec/
H A Dcputlb.h104 * MMU indexes.
114 * MMU indexes.
136 * Flush the entire TLB for all CPUs, for all MMU indexes.
147 * @idxmap: bitmap of MMU indexes to flush
150 * MMU indexes.
159 * @idxmap: bitmap of MMU indexes to flush
162 * MMU indexes.
174 * @idxmap: bitmap of MMU indexes to flush
177 * MMU indexes.
184 * @idxmap: bitmap of MMU indexes to flush
[all …]
/qemu/include/hw/ppc/
H A Dspapr_drc.h51 * when generating DRC indexes later we've aligned the bit
52 * positions with the values used to assign DRC indexes on
55 * for values exposed to the guest (via DRC indexes for
/qemu/include/semihosting/
H A Dguestfd.h23 * Guest file descriptors are integer indexes into an array of
/qemu/hw/misc/
H A Darmv7m_ras.c29 /* Minimal RAS: we implement 0 error record indexes */ in ras_read()
H A Dtz-mpc.c24 /* Our IOMMU has two IOMMU indexes, one for secure transactions and one for
535 /* BLK_MAX is the max value of BLK_IDX, which indexes an array of 32-bit in tz_mpc_realize()
H A Deccmemctl.c48 /* Register indexes */
/qemu/include/hw/misc/
H A Dsifive_u_prci.h85 * Clock indexes for use by Device Tree data and the PRCI driver.
/qemu/include/hw/xen/interface/io/
H A Dring.h47 * ring and indexes (_sz), and the name tag of the request/response structure.
350 * does not define the indexes page. As different protocols can have
375 * Indexes page, shared between frontend and backend. It also
H A Dblkif.h287 * at page index "%u". Page indexes are zero based.
612 * NB. This could be 12 if the ring indexes weren't stored in the same page.
/qemu/hw/ppc/
H A Dspapr_drc.c858 g_assert(!fdt_get_property(fdt, offset, "ibm,drc-indexes", NULL)); in spapr_dt_drc()
901 /* ibm,drc-indexes */ in spapr_dt_drc()
927 ret = fdt_setprop(fdt, offset, "ibm,drc-indexes", in spapr_dt_drc()
931 error_report("Couldn't create ibm,drc-indexes property"); in spapr_dt_drc()
1138 * indexes, bytes for field offset/len values.
/qemu/qobject/
H A Dblock-qdict.c328 * valid list indexes, this will return 1. If @maybe_list is zero
331 * keys, or the list indexes are non-contiguous, an error is reported.
417 * - If keys in @src represent list indexes, but are not in
/qemu/include/standard-headers/linux/
H A Dvirtio_snd.h33 /* device virtqueue indexes */
460 /* VIRTIO_SND_CTL_TYPE_ENUMERATED value (option indexes) */
H A Dvirtio_ring.h226 * event indexes in virtio start at 0. */ in vring_need_event()
/qemu/docs/devel/
H A Debpf_rss.rst83 - map_indirections_table - 128 elements of queue indexes.
/qemu/hw/display/
H A Dvga_regs.h59 /* standard VGA indexes max counts */
/qemu/target/openrisc/
H A Dmmu.c48 /* If the ITLB and DTLB indexes map to the same page, we want to in get_phys_mmu()
/qemu/linux-headers/linux/
H A Dvfio.h311 * vfio bus drivers of defining which region indexes correspond to which region
312 * on the device, without needing to resort to static indexes, as done by
314 * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes
505 * Implementation of IRQ mapping is bus driver specific. Indexes
525 * indexes, but VFIO needs to enable a specific number of vectors
637 VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */
/qemu/util/
H A Dkeyval.c397 * Replace QDicts whose keys are all valid list indexes by QLists.
473 /* Even though dict keys are distinct, indexes need not be */ in keyval_listify()
/qemu/tests/unit/
H A Dcheck-block-qdict.c674 /* List indexes must not have gaps */ in qdict_crumple_test_bad_inputs()
683 /* List indexes must be in %zu format */ in qdict_crumple_test_bad_inputs()
/qemu/docs/specs/
H A Dppc-spapr-hotplug.rst37 of ``ibm,drc-indexes``:
63 ``ibm,drc-indexes``
/qemu/target/arm/
H A Dcpu.h854 /* List of register indexes managed via these arrays; (full KVM style
855 * 64 bit indexes, not CPRegInfo 32 bit indexes)
860 /* Length of the indexes, values, reset_values arrays */
2750 * R profile CPUs have an MPU, but can use the same set of MMU indexes
2755 * They have the following different MMU indexes:
2768 * vs A/R profile) would like to use MMU indexes with different semantics,
2886 /* Indexes used when registering address spaces with cpu_address_space_init */
2896 /* Assert the relative order of the physical mmu indexes. */ in arm_space_to_phys()
H A Dcpregs.h351 /* Indexes into fgt_read[] */
354 /* Indexes into fgt_write[] */
357 /* Indexes into fgt_exec[] */
/qemu/docs/system/s390x/
H A Dvfio-ap.rst105 indexes (AQM). For example, if adapters 1 and 2 and usage domains 5 and 6 are
234 The ``aqmask`` is a 256-bit mask that identifies a set of AP queue indexes
499 adapter numbers (APID) and queue indexes (APQI) specified in the APM and AQM
/qemu/include/hw/xen/interface/
H A Dtrace.h288 * field, indexes into an array of struct t_rec's.
/qemu/hw/intc/
H A Darm_gic_common.c289 /* vCPU states are stored at indexes GIC_NCPU .. GIC_NCPU+num_cpu. in arm_gic_common_reset_hold()

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