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/linux-5.10/sound/soc/samsung/
Ds3c-i2s-v2.c1 // SPDX-License-Identifier: GPL-2.0+
3 // ALSA Soc Audio Layer - I2S core for newer Samsung SoCs.
9 // Copyright (c) 2008, 2007, 2004-2005 Simtec Electronics
21 #include "regs-i2s-v2.h"
22 #include "s3c-i2s-v2.h"
72 static void s3c2412_snd_txctrl(struct s3c_i2sv2_info *i2s, int on) in s3c2412_snd_txctrl() argument
74 void __iomem *regs = i2s->regs; in s3c2412_snd_txctrl() local
79 fic = readl(regs + S3C2412_IISFIC); in s3c2412_snd_txctrl()
80 con = readl(regs + S3C2412_IISCON); in s3c2412_snd_txctrl()
81 mod = readl(regs + S3C2412_IISMOD); in s3c2412_snd_txctrl()
[all …]
Ds3c2412-i2s.c1 // SPDX-License-Identifier: GPL-2.0+
3 // ALSA Soc Audio Layer - S3C2412 I2S driver
9 // Copyright (c) 2007, 2004-2005 Simtec Electronics
23 #include "regs-i2s-v2.h"
24 #include "s3c2412-i2s.h"
26 #include <linux/platform_data/asoc-s3c.h>
56 s3c2412_i2s.iis_cclk = devm_clk_get(dai->dev, "i2sclk"); in s3c2412_i2s_probe()
90 struct s3c_i2sv2_info *i2s = snd_soc_dai_get_drvdata(cpu_dai); in s3c2412_i2s_hw_params() local
95 iismod = readl(i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
107 writel(iismod, i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
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Ds3c-i2s-v2.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
10 /* This code is the core support for the I2S block found in a number of
11 * Samsung SoC devices which is unofficially named I2S-V2. Currently the
12 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
27 /* Set this flag for I2S controllers that have the bit IISMOD[12]
33 * struct s3c_i2sv2_info - S3C I2S-V2 information
35 * @regs: The pointer to the device registe block.
36 * @feature: Set of bit-flags indicating features of the controller.
37 * @master: True if the I2S core is the I2S bit clock master.
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Didma.c1 // SPDX-License-Identifier: GPL-2.0+
3 // idma.c - I2S0 internal DMA driver
10 #include <linux/dma-mapping.h>
17 #include "i2s.h"
19 #include "i2s-regs.h"
52 void __iomem *regs; member
61 (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; in idma_getpos()
66 struct snd_pcm_runtime *runtime = substream->runtime; in idma_enqueue()
67 struct idma_ctrl *prtd = substream->runtime->private_data; in idma_enqueue()
70 spin_lock(&prtd->lock); in idma_enqueue()
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Ds3c24xx-i2s.c1 // SPDX-License-Identifier: GPL-2.0+
3 // s3c24xx-i2s.c -- ALSA Soc Audio Layer
8 // Copyright 2004-2005 Simtec Electronics
21 #include "regs-iis.h"
23 #include "s3c24xx-i2s.h"
36 void __iomem *regs; member
51 iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON); in s3c24xx_snd_txctrl()
52 iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON); in s3c24xx_snd_txctrl()
53 iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD); in s3c24xx_snd_txctrl()
63 writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD); in s3c24xx_snd_txctrl()
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Dodroid.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
12 #include "i2s.h"
13 #include "i2s-regs.h"
28 struct snd_pcm_runtime *runtime = substream->runtime; in odroid_card_fe_startup()
39 struct odroid_priv *priv = snd_soc_card_get_drvdata(rtd->card); in odroid_card_fe_hw_params()
43 spin_lock_irqsave(&priv->lock, flags); in odroid_card_fe_hw_params()
44 if (priv->be_active && priv->be_sample_rate != params_rate(params)) in odroid_card_fe_hw_params()
45 ret = -EINVAL; in odroid_card_fe_hw_params()
46 spin_unlock_irqrestore(&priv->lock, flags); in odroid_card_fe_hw_params()
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/linux-5.10/sound/soc/meson/
Dg12a-tohdmitx.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <sound/soc-dai.h>
15 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
16 #include "meson-codec-glue.h"
18 #define G12A_TOHDMITX_DRV_NAME "g12a-tohdmitx"
35 "I2S A", "I2S B", "I2S C",
45 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in g12a_tohdmitx_i2s_mux_put_enum()
48 mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]); in g12a_tohdmitx_i2s_mux_put_enum()
49 changed = snd_soc_component_test_bits(component, e->reg, in g12a_tohdmitx_i2s_mux_put_enum()
60 snd_soc_component_update_bits(component, e->reg, in g12a_tohdmitx_i2s_mux_put_enum()
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Daiu.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <sound/soc-dai.h>
15 #include <dt-bindings/sound/meson-aiu.h>
17 #include "aiu-fifo.h"
22 "SPDIF", "I2S",
38 { "I2S Encoder Playback", NULL, "I2S FIFO Playback" },
40 { "SPDIF SRC SEL", "I2S", "I2S FIFO Playback" },
52 if (args->args_count != 2) in aiu_of_xlate_dai_name()
53 return -EINVAL; in aiu_of_xlate_dai_name()
55 if (args->args[0] != component_id) in aiu_of_xlate_dai_name()
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Dg12a-toacodec.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <sound/soc-dai.h>
16 #include <dt-bindings/sound/meson-g12a-toacodec.h>
17 #include "axg-tdm.h"
18 #include "meson-codec-glue.h"
20 #define G12A_TOACODEC_DRV_NAME "g12a-toacodec"
36 "I2S A", "I2S B", "I2S C",
46 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in g12a_toacodec_mux_put_enum()
49 mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]); in g12a_toacodec_mux_put_enum()
50 changed = snd_soc_component_test_bits(component, e->reg, in g12a_toacodec_mux_put_enum()
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/linux-5.10/sound/soc/xtensa/
Dxtfpga-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xtfpga I2S controller driver
17 #define DRV_NAME "xtfpga-i2s"
46 * I2S controller operation:
61 void __iomem *regs; member
69 * read-side critical section. Trigger callback sets and clears the
76 unsigned (*tx_fn)(struct xtfpga_i2s *i2s,
123 * xtfpga_pcm_tx_2x16 for 16-bit stereo.
125 * FIFO consists of 32-bit words, one word per channel, always 2 channels.
126 * If I2S interface is configured with smaller sample resolution, only
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/linux-5.10/sound/soc/tegra/
Dtegra20_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_i2s.c - Tegra20 I2S driver
6 * Copyright (C) 2010,2012 - NVIDIA, Inc.
10 * Copyright (c) 2009-2010, NVIDIA Corporation.
34 #define DRV_NAME "tegra20-i2s"
38 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_suspend() local
40 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
47 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_resume() local
50 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
62 struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra20_i2s_set_fmt() local
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Dtegra30_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra30_i2s.c - Tegra30 I2S driver
6 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
10 * Copyright (c) 2009-2010, NVIDIA Corporation.
36 #define DRV_NAME "tegra30-i2s"
40 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_suspend() local
42 regcache_cache_only(i2s->regmap, true); in tegra30_i2s_runtime_suspend()
44 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
51 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_resume() local
54 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
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Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_i2s.c - Tegra210 I2S driver
31 * is required to select i2s4b for it to be functional for I2S
42 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
50 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
56 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
62 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()
67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
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/linux-5.10/Documentation/devicetree/bindings/sound/
Dintel,keembay-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel KeemBay I2S Device Tree Bindings
11 - Sia, Jee Heng <jee.heng.sia@intel.com>
14 Intel KeemBay I2S
19 - intel,keembay-i2s
20 - intel,keembay-tdm
22 "#sound-dai-cells":
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Dst,sti-asoc-card.txt3 The sti ASoC Sound Card can be used, for all sti SoCs using internal sti-sas
8 Documentation/devicetree/bindings/sound/simple-card.yaml.
10 1) sti-uniperiph-dai: audio dai device.
11 ---------------------------------------
14 - compatible: "st,stih407-uni-player-hdmi", "st,stih407-uni-player-pcm-out",
15 "st,stih407-uni-player-dac", "st,stih407-uni-player-spdif",
16 "st,stih407-uni-reader-pcm_in", "st,stih407-uni-reader-hdmi",
18 - st,syscfg: phandle to boot-device system configuration registers
20 - clock-names: name of the clocks listed in clocks property in the same order
22 - reg: CPU DAI IP Base address and size entries, listed in same
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/linux-5.10/sound/soc/rockchip/
Drockchip_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
7 * Author: Jianqun <jay.xu@rock-chips.com>
24 #define DRV_NAME "rockchip-i2s"
45 * I2S controller hopes to start the tx and rx together,
56 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_suspend() local
58 regcache_cache_only(i2s->regmap, true); in i2s_runtime_suspend()
59 clk_disable_unprepare(i2s->mclk); in i2s_runtime_suspend()
66 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_resume() local
69 ret = clk_prepare_enable(i2s->mclk); in i2s_runtime_resume()
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/linux-5.10/sound/soc/fsl/
Dmpc5200_psc_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Freescale MPC5200 PSC in I2S mode
22 * PSC_I2S_RATES: sample rates supported by the I2S
24 * This driver currently only supports the PSC running in I2S slave mode,
32 * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode
45 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i" in psc_i2s_hw_params()
65 dev_dbg(psc_dma->dev, "invalid format\n"); in psc_i2s_hw_params()
66 return -EINVAL; in psc_i2s_hw_params()
68 out_be32(&psc_dma->psc_regs->sicr, psc_dma->sicr | mode); in psc_i2s_hw_params()
91 dev_dbg(psc_dma->dev, "psc_i2s_set_sysclk(cpu_dai=%p, dir=%i)\n", in psc_i2s_set_sysclk()
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Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
52 #include "imx-pcm.h"
54 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
65 * (bit-endianness must match byte-endianness). Processors typically write
67 * written in. So if the host CPU is big-endian, then only big-endian
90 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
91 * - Also have NB_NF to mark these two clocks will not be inverted
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/linux-5.10/sound/soc/cirrus/
Dep93xx-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/sound/soc/ep93xx-i2s.c
4 * EP93xx I2S driver
26 #include <linux/platform_data/dma-ep93xx.h>
29 #include "ep93xx-pcm.h"
59 * 0 - Generate interrupt when FIFO is half empty
60 * 1 - Generate interrupt when FIFO is empty
77 void __iomem *regs; member
84 .name = "i2s-pcm-out",
89 .name = "i2s-pcm-in",
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/linux-5.10/sound/soc/bcm/
Dbcm63xx-i2s-whistler.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // linux/sound/bcm/bcm63xx-i2s-whistler.c
3 // BCM63xx whistler i2s driver
5 // Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
8 #include <linux/dma-mapping.h>
14 #include "bcm63xx-i2s.h"
16 #define DRV_NAME "brcm-i2s"
81 ret = clk_set_rate(i2s_priv->i2s_clk, params_rate(params)); in bcm63xx_i2s_hw_params()
83 dev_err(i2s_priv->dev, in bcm63xx_i2s_hw_params()
94 struct regmap *regmap_i2s = i2s_priv->regmap_i2s; in bcm63xx_i2s_startup()
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/linux-5.10/sound/soc/sunxi/
Dsun4i-i2s.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
22 #include <sound/soc-dai.h>
82 #define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0)
90 /* Defines required for sun8i-h3 support */
103 #define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
113 #define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) ((chan - 1) << 4)
115 #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1)
122 #define SUN8I_I2S_TX_CHAN_EN(num_chan) (((1 << num_chan) - 1) << 4)
130 * struct sun4i_i2s_quirks - Differences between SoC variants.
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/linux-5.10/arch/arm/mach-s3c/
Dpl080.c1 // SPDX-License-Identifier: GPL-2.0
3 // Samsung's S3C64XX generic DMA support using amba-pl08x driver.
17 #include "regs-sys-s3c64xx.h"
21 return cd->min_signal; in pl08x_get_xfer_signal()
117 { "s3c6400-uart.0", "tx", &s3c64xx_dma0_info[0] },
118 { "s3c6400-uart.0", "rx", &s3c64xx_dma0_info[1] },
119 { "s3c6400-uart.1", "tx", &s3c64xx_dma0_info[2] },
120 { "s3c6400-uart.1", "rx", &s3c64xx_dma0_info[3] },
121 { "s3c6400-uart.2", "tx", &s3c64xx_dma0_info[4] },
122 { "s3c6400-uart.2", "rx", &s3c64xx_dma0_info[5] },
[all …]
/linux-5.10/sound/soc/kirkwood/
Dkirkwood-i2s.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * kirkwood-i2s.c
6 * (c) 2010 Arnaud Patard <arnaud.patard@rtp-net.org>
20 #include <linux/platform_data/asoc-kirkwood.h>
52 return -EINVAL; in kirkwood_i2s_set_fmt()
59 value = readl(priv->io+KIRKWOOD_I2S_PLAYCTL); in kirkwood_i2s_set_fmt()
62 writel(value, priv->io+KIRKWOOD_I2S_PLAYCTL); in kirkwood_i2s_set_fmt()
64 value = readl(priv->io+KIRKWOOD_I2S_RECCTL); in kirkwood_i2s_set_fmt()
67 writel(value, priv->io+KIRKWOOD_I2S_RECCTL); in kirkwood_i2s_set_fmt()
104 if (IS_ERR(priv->extclk)) { in kirkwood_set_rate()
[all …]
/linux-5.10/arch/arm/boot/dts/
Darmada-370-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6710-BP-DDR3)
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include "armada-370.dtsi"
27 compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";
30 stdout-path = "serial0:115200n8";
43 internal-regs {
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/linux-5.10/include/linux/mfd/wm8994/
Dpdata.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm8994/pdata.h -- Platform data for WM8994
39 * panel provided by the WISCE - see http://www.wolfsonmicro.com/wisce/
44 u16 regs[WM8994_DRC_REGS]; member
52 * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
57 u16 regs[WM8994_EQ_REGS]; member
64 * WISCE - see http://www.wolfsonmicro.com/wisce/
78 * multiband compressor configuration panel in WISCE - see
83 u16 regs[WM8958_VSS_HPF_REGS]; member
89 * multiband compressor configuration panel in WISCE - see
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