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/qemu/hw/ppc/
H A Dpnv_i2c.c2 * QEMU PowerPC PowerNV Processor I2C model
25 #include "hw/i2c/pnv_i2c_regs.h"
27 static I2CBus *pnv_i2c_get_bus(PnvI2C *i2c) in pnv_i2c_get_bus() argument
29 uint8_t port = GETFIELD(I2C_MODE_PORT_NUM, i2c->regs[I2C_MODE_REG]); in pnv_i2c_get_bus()
31 if (port >= i2c->num_busses) { in pnv_i2c_get_bus()
32 qemu_log_mask(LOG_GUEST_ERROR, "I2C: invalid bus number %d/%d\n", port, in pnv_i2c_get_bus()
33 i2c->num_busses); in pnv_i2c_get_bus()
36 return i2c->busses[port]; in pnv_i2c_get_bus()
39 static void pnv_i2c_update_irq(PnvI2C *i2c) in pnv_i2c_update_irq() argument
41 I2CBus *bus = pnv_i2c_get_bus(i2c); in pnv_i2c_update_irq()
[all …]
/qemu/hw/i2c/
H A Dppc4xx_i2c.c2 * PPC4xx I2C controller emulation
32 #include "hw/i2c/ppc4xx_i2c.h"
91 PPC4xxI2CState *i2c = PPC4xx_I2C(s); in ppc4xx_i2c_reset() local
93 i2c->mdidx = -1; in ppc4xx_i2c_reset()
94 memset(i2c->mdata, 0, ARRAY_SIZE(i2c->mdata)); in ppc4xx_i2c_reset()
96 i2c->cntl = 0; in ppc4xx_i2c_reset()
97 i2c->mdcntl = 0; in ppc4xx_i2c_reset()
98 i2c->sts = 0; in ppc4xx_i2c_reset()
99 i2c->extsts = IIC_EXTSTS_BCS_FREE; in ppc4xx_i2c_reset()
100 i2c->clkdiv = 0; in ppc4xx_i2c_reset()
[all …]
H A Dbitbang_i2c.c2 * Bit-Bang i2c emulation extracted from
15 #include "hw/i2c/bitbang_i2c.h"
48 static void bitbang_i2c_set_state(bitbang_i2c_interface *i2c, in bitbang_i2c_set_state() argument
51 trace_bitbang_i2c_state(sname[i2c->state], sname[state]); in bitbang_i2c_set_state()
52 i2c->state = state; in bitbang_i2c_set_state()
55 static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) in bitbang_i2c_enter_stop() argument
57 if (i2c->current_addr >= 0) in bitbang_i2c_enter_stop()
58 i2c_end_transfer(i2c->bus); in bitbang_i2c_enter_stop()
59 i2c->current_addr = -1; in bitbang_i2c_enter_stop()
60 bitbang_i2c_set_state(i2c, STOPPED); in bitbang_i2c_enter_stop()
[all …]
H A DKconfig1 config I2C config
5 # Device group for i2c devices which can reasonably be user-plugged
6 # to any board's i2c bus
11 select I2C
27 select I2C
31 select I2C
35 select I2C
39 select I2C
43 select I2C
51 select I2C
H A Dmpc_i2c.c7 * This file is derived from IMX I2C controller,
21 #include "hw/i2c/i2c.h"
38 #define TYPE_MPC_I2C "mpc-i2c"
115 MPCI2CState *i2c = MPC_I2C(dev); in mpc_i2c_reset() local
117 i2c->address = 0xFF; in mpc_i2c_reset()
118 i2c->adr = 0x00; in mpc_i2c_reset()
119 i2c->fdr = 0x00; in mpc_i2c_reset()
120 i2c->cr = 0x00; in mpc_i2c_reset()
121 i2c->sr = 0x81; in mpc_i2c_reset()
122 i2c->dr = 0x00; in mpc_i2c_reset()
[all …]
H A Di2c_mux_pca954x.c2 * I2C multiplexer for PCA954x series of I2C multiplexer/switch chips.
19 #include "hw/i2c/i2c.h"
20 #include "hw/i2c/i2c_mux_pca954x.h"
21 #include "hw/i2c/smbus_slave.h"
37 * @channel: The set of i2c channel buses that act as channels which own the
38 * i2c children.
53 * @nchans: The number of i2c channels this device has.
194 d->id = g_strdup_printf("pca954x[%x]", s->parent.i2c.address); in pca954x_realize()
206 g_autofree gchar *bus_name = g_strdup_printf("i2c.%d", i); in pca954x_init()
229 dc->desc = "Pca954x i2c-mux"; in pca954x_class_init()
/qemu/tests/qtest/libqos/
H A Di2c-imx.c2 * QTest i.MX I2C driver
21 #include "i2c.h"
26 #include "hw/i2c/imx_i2c.h"
40 static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, in imx_i2c_send() argument
43 IMXI2C *s = container_of(i2c, IMXI2C, parent); in imx_i2c_send()
59 qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); in imx_i2c_send()
60 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
65 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
70 qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); in imx_i2c_send()
71 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
[all …]
H A Di2c-omap.c2 * QTest I2C driver
10 #include "i2c.h"
53 static void omap_i2c_send(I2CAdapter *i2c, uint8_t addr, in omap_i2c_send() argument
56 OMAPI2C *s = container_of(i2c, OMAPI2C, parent); in omap_i2c_send()
62 qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data); in omap_i2c_send()
69 qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data); in omap_i2c_send()
70 data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); in omap_i2c_send()
73 data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); in omap_i2c_send()
77 data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); in omap_i2c_send()
81 qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data); in omap_i2c_send()
[all …]
H A Di2c.h2 * I2C libqos
37 * like obj->get_driver("i2c-device").
39 * In fact there is no i2c-device interface even, because there are
40 * no generic I2C tests).
62 /* i2c-omap.c */
72 /* i2c-imx.c */
/qemu/tests/functional/
H A Dtest_arm_aspeed_ast2600.py30 'tmp105,bus=aspeed.i2c.bus.3,address=0x4d,id=tmp-test')
32 'ds1338,bus=aspeed.i2c.bus.3,address=0x32')
34 'i2c-echo,bus=aspeed.i2c.bus.3,address=0x42')
39 'echo lm75 0x4d > /sys/class/i2c-dev/i2c-3/device/new_device',
40 'i2c i2c-3: new_device: Instantiated device lm75 at 0x4d')
49 'echo ds1307 0x32 > /sys/class/i2c-dev/i2c-3/device/new_device',
50 'i2c i2c-3: new_device: Instantiated device ds1307 at 0x32')
55 'echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-3/new_device',
56 'i2c i2c-3: new_device: Instantiated device slave-24c02 at 0x64')
60 'hexdump /sys/bus/i2c/devices/3-1064/slave-eeprom',
[all …]
/qemu/hw/arm/
H A Daspeed.c19 #include "hw/i2c/i2c_mux_pca954x.h"
20 #include "hw/i2c/smbus_eeprom.h"
532 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); in palmetto_bmc_i2c_init()
534 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, in palmetto_bmc_i2c_init()
538 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), in palmetto_bmc_i2c_init()
554 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c); in quanta_q71l_bmc_i2c_init()
555 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e); in quanta_q71l_bmc_i2c_init()
556 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f); in quanta_q71l_bmc_i2c_init()
558 /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */ in quanta_q71l_bmc_i2c_init()
559 /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */ in quanta_q71l_bmc_i2c_init()
[all …]
/qemu/include/hw/i2c/
H A Di2c.h7 /* The QEMU I2C implementation only supports simple transfers that complete
22 #define TYPE_I2C_SLAVE "i2c-slave"
62 /* Remaining fields for internal use by the I2C code. */
66 #define TYPE_I2C_BUS "i2c-bus"
101 * i2c_start_transfer: start a transfer on an I2C bus.
115 * i2c_start_recv: start a 'receive' transfer on an I2C bus.
125 * i2c_start_send: start a 'send' transfer on an I2C bus.
135 * i2c_start_send_async: start an asynchronous 'send' transfer on an I2C bus.
158 * Create an I2C slave device on the heap.
160 * @addr: I2C address of the slave when put on a bus
[all …]
H A Di2c_mux_pca954x.h4 #include "hw/i2c/i2c.h"
10 * Retrieves the i2c bus associated with the specified channel on this i2c
12 * @mux: an i2c mux device.
13 * @channel: the i2c channel requested
15 * Returns: a pointer to the associated i2c bus.
H A Dpnv_i2c_regs.h2 * PowerNV I2C Controller Register Definitions
12 /* I2C FIFO register */
16 /* I2C command register */
30 /* I2C mode register */
39 /* I2C watermark register */
45 * I2C interrupt mask and condition registers
78 /* I2C status register */
112 /* I2C extended status register */
128 /* I2C residual front end/back end length */
H A Dbcm2835_i2c.h28 #include "hw/i2c/i2c.h"
31 #define TYPE_BCM2835_I2C "bcm2835-i2c"
43 #define BCM2835_I2C_C_I2CEN BIT(15) /* I2C enable */
49 #define BCM2835_I2C_C_READ BIT(0) /* I2C read mode */
59 #define BCM2835_I2C_S_DONE BIT(1) /* I2C Transfer complete */
60 #define BCM2835_I2C_S_TA BIT(0) /* I2C Transfer active */
/qemu/hw/sensor/
H A DKconfig3 depends on I2C
8 depends on I2C
13 depends on I2C
18 depends on I2C
23 depends on I2C
32 depends on I2C
36 depends on I2C
H A Dtmp105.c22 #include "hw/i2c/i2c.h"
155 trace_tmp105_read(s->i2c.address, s->pointer); in tmp105_read()
160 trace_tmp105_write(s->i2c.address, s->pointer); in tmp105_write()
168 trace_tmp105_write_shutdown(s->i2c.address); in tmp105_write()
186 static uint8_t tmp105_rx(I2CSlave *i2c) in tmp105_rx() argument
188 TMP105State *s = TMP105(i2c); in tmp105_rx()
197 static int tmp105_tx(I2CSlave *i2c, uint8_t data) in tmp105_tx() argument
199 TMP105State *s = TMP105(i2c); in tmp105_tx()
215 static int tmp105_event(I2CSlave *i2c, enum i2c_event event) in tmp105_event() argument
217 TMP105State *s = TMP105(i2c); in tmp105_event()
[all …]
H A Ddps310.c12 #include "hw/i2c/i2c.h"
21 I2CSlave i2c; member
136 static uint8_t dps310_rx(I2CSlave *i2c) in dps310_rx() argument
138 DPS310State *s = DPS310(i2c); in dps310_rx()
147 static int dps310_tx(I2CSlave *i2c, uint8_t data) in dps310_tx() argument
149 DPS310State *s = DPS310(i2c); in dps310_tx()
165 static int dps310_event(I2CSlave *i2c, enum i2c_event event) in dps310_event() argument
167 DPS310State *s = DPS310(i2c); in dps310_event()
195 VMSTATE_I2C_SLAVE(i2c, DPS310State),
H A Dtmp421.c28 #include "hw/i2c/i2c.h"
54 I2CSlave i2c; member
227 static void tmp421_reset(I2CSlave *i2c);
247 static uint8_t tmp421_rx(I2CSlave *i2c) in tmp421_rx() argument
249 TMP421State *s = TMP421(i2c); in tmp421_rx()
258 static int tmp421_tx(I2CSlave *i2c, uint8_t data) in tmp421_tx() argument
260 TMP421State *s = TMP421(i2c); in tmp421_tx()
277 static int tmp421_event(I2CSlave *i2c, enum i2c_event event) in tmp421_event() argument
279 TMP421State *s = TMP421(i2c); in tmp421_event()
301 VMSTATE_I2C_SLAVE(i2c, TMP421State),
[all …]
/qemu/hw/display/
H A Di2c-ddc.c1 /* A simple I2C slave for returning monitor EDID data via DDC.
22 #include "hw/i2c/i2c.h"
25 #include "hw/display/i2c-ddc.h"
33 qemu_log("i2c-ddc: " fmt , ## __VA_ARGS__); \
45 static int i2c_ddc_event(I2CSlave *i2c, enum i2c_event event) in i2c_ddc_event() argument
47 I2CDDCState *s = I2CDDC(i2c); in i2c_ddc_event()
56 static uint8_t i2c_ddc_rx(I2CSlave *i2c) in i2c_ddc_rx() argument
58 I2CDDCState *s = I2CDDC(i2c); in i2c_ddc_rx()
66 static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data) in i2c_ddc_tx() argument
68 I2CDDCState *s = I2CDDC(i2c); in i2c_ddc_tx()
H A Dsii9022.c18 #include "hw/i2c/i2c.h"
20 #include "hw/display/i2c-ddc.h"
65 static int sii9022_event(I2CSlave *i2c, enum i2c_event event) in sii9022_event() argument
67 sii9022_state *s = SII9022(i2c); in sii9022_event()
86 static uint8_t sii9022_rx(I2CSlave *i2c) in sii9022_rx() argument
88 sii9022_state *s = SII9022(i2c); in sii9022_rx()
115 static int sii9022_tx(I2CSlave *i2c, uint8_t data) in sii9022_tx() argument
117 sii9022_state *s = SII9022(i2c); in sii9022_tx()
/qemu/hw/tpm/
H A Dtpm_tis_i2c.c2 * tpm_tis_i2c.c - QEMU's TPM TIS I2C Device
12 * TPM I2C implementation follows TCG TPM I2c Interface specification,
21 #include "hw/i2c/i2c.h"
45 /* i2c registers */
66 uint8_t i2c_reg; /* I2C register */
78 * mapping are not sent to TIS layer and handled in I2c layer.
114 .name = "tpm-tis-i2c",
128 /* i2c specifics */
152 * expected by I2C. Save the capability in the data array overwriting the TIS
160 /* Now generate i2c capability */ in tpm_tis_i2c_interface_capability()
[all …]
/qemu/hw/rtc/
H A Dm41t80.c15 #include "hw/i2c/i2c.h"
34 static int m41t80_send(I2CSlave *i2c, uint8_t data) in m41t80_send() argument
36 M41t80State *s = M41T80(i2c); in m41t80_send()
46 static uint8_t m41t80_recv(I2CSlave *i2c) in m41t80_recv() argument
48 M41t80State *s = M41T80(i2c); in m41t80_recv()
87 static int m41t80_event(I2CSlave *i2c, enum i2c_event event) in m41t80_event() argument
89 M41t80State *s = M41T80(i2c); in m41t80_event()
/qemu/include/hw/display/
H A Di2c-ddc.h1 /* A simple I2C slave for returning monitor EDID data via DDC.
23 #include "hw/i2c/i2c.h"
26 /* A simple I2C slave which just returns the contents of its EDID blob. */
29 I2CSlave i2c; member
38 #define TYPE_I2CDDC "i2c-ddc"
/qemu/include/hw/nvram/
H A Deeprom_at24c.h10 #include "hw/i2c/i2c.h"
14 * @bus: I2C bus to put it on
15 * @address: I2C address of the EEPROM slave when put on a bus
26 * @bus: I2C bus to put it on
27 * @address: I2C address of the EEPROM slave when put on a bus

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