Searched +full:i2c +full:- +full:scl +full:- +full:internal +full:- +full:delay +full:- +full:ns (Results 1 – 25 of 46) sorted by relevance
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/linux-6.8/Documentation/devicetree/bindings/i2c/ |
D | renesas,rcar-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car I2C Controller 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 15 - items: 16 - enum: 17 - renesas,i2c-r8a7778 # R-Car M1A 18 - renesas,i2c-r8a7779 # R-Car H1 [all …]
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D | i2c.txt | 1 Generic device tree bindings for I2C busses 4 This document describes generic bindings which can be used to describe I2C 8 ----------------------------- 10 - #address-cells - should be <1>. Read more about addresses below. 11 - #size-cells - should be <0>. 12 - compatible - name of I2C bus controller 17 The cells properties above define that an address of children of an I2C bus 21 ----------------------------- 26 - clock-frequency 29 - i2c-bus [all …]
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D | samsung,s3c2410-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S3C/S5P/Exynos SoC I2C Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enum: 16 - samsung,s3c2410-i2c 17 - samsung,s3c2440-i2c 18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: [all …]
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/linux-6.8/arch/arm/boot/dts/rockchip/ |
D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = "serial2:115200n8"; 31 power_button: power-button { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pwr_key_l>; 36 key-power { 40 debounce-interval = <100>; [all …]
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/linux-6.8/arch/arm64/boot/dts/mediatek/ |
D | mt8186-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 5 /dts-v1/; 10 chassis-type = "embedded"; 11 compatible = "mediatek,mt8186-evb", "mediatek,mt8186"; 18 stdout-path = "serial0:921600n8"; 30 clock-frequency = <400000>; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&i2c0_pins>; 38 clock-frequency = <400000>; 39 i2c-scl-internal-delay-ns = <8000>; [all …]
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D | mt8183-kukui-jacuzzi-pico.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8183-kukui-jacuzzi.dtsi" 8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi" 12 chassis-type = "convertible"; 13 compatible = "google,pico-sku1", "google,pico", "mediatek,mt8183"; 17 google,remote-bus = <0>; 21 i2c-scl-internal-delay-ns = <25000>; 24 compatible = "hid-over-i2c"; 26 hid-descr-addr = <0x20>; [all …]
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D | mt8183-kukui-jacuzzi-pico6.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8183-kukui-jacuzzi.dtsi" 8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi" 12 chassis-type = "convertible"; 13 compatible = "google,pico-sku2", "google,pico", "mediatek,mt8183"; 15 bt_wakeup: bt-wakeup { 16 compatible = "gpio-keys"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&bt_pins_wakeup>; [all …]
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/linux-6.8/arch/arm/boot/dts/renesas/ |
D | r8a7792.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V2H (R8A77920) SoC 8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/r8a7792-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; [all …]
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D | r8a77470.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11 #include <dt-bindings/power/r8a77470-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 26 #address-cells = <1>; 27 #size-cells = <0>; 31 compatible = "arm,cortex-a7"; [all …]
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D | r8a7778.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M1A (R8A77781) SoC 14 #include <dt-bindings/clock/r8a7778-clock.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #include <dt-bindings/interrupt-controller/irq.h> 20 interrupt-parent = <&gic>; 21 #address-cells = <1>; 22 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <0>; [all …]
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D | r8a7793.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC 5 * Copyright (C) 2014-2015 Renesas Electronics Corporation 8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/power/r8a7793-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 37 compatible = "fixed-clock"; [all …]
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D | r8a7779.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H1 (R8A77790) SoC 9 #include <dt-bindings/clock/r8a7779-clock.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7779-sysc.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 21 #address-cells = <1>; [all …]
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D | r8a7794.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7794-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; [all …]
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D | r8a7745.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7745-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; [all …]
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/linux-6.8/arch/arm64/boot/dts/renesas/ |
D | r8a779f0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC 8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779f0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 cluster01_opp: opp-table-0 { 18 compatible = "operating-points-v2"; 19 opp-shared; [all …]
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D | r8a77970.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3M (R8A77970) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a77970-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ [all …]
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D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3H (R8A77980) SoC 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/r8a77980-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ 21 compatible = "fixed-clock"; [all …]
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D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a774c0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; [all …]
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D | r8a779g0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779g0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External Audio clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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D | r8a77990.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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D | r8a779a0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779a0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External CAN clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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D | r8a77961.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77961-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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D | r8a774a1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774a1-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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D | r8a77965.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/r8a77965-sysc.h> 19 #address-cells = <2>; 20 #size-cells = <2>; 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <0>; [all …]
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/linux-6.8/arch/arm/boot/dts/st/ |
D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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