| /linux-5.10/drivers/block/paride/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
9 comment "Parallel IDE high-level drivers"
16 This option enables the high-level driver for IDE-type disk devices
23 EZ-135, EZ-230 and SparQ drives, the Avatar Shark and the backpack
27 tristate "Parallel port ATAPI CD-ROMs"
32 This option enables the high-level driver for ATAPI CD-ROM devices
35 parallel port ATAPI CD-ROM driver, otherwise you should answer M to
39 MicroSolutions backpack CD-ROM drives and the Freecom Power CD. If
40 you have such a CD-ROM drive, you should also say Y or M to "ISO
41 9660 CD-ROM file system support" below, because that's the file
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| /linux-5.10/security/selinux/ss/ |
| D | constraint.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * beyond the type-based rules in `te' or the role-based
36 #define CEXPR_L1L2 32 /* low level 1 vs. low level 2 */
37 #define CEXPR_L1H2 64 /* low level 1 vs. high level 2 */
38 #define CEXPR_H1L2 128 /* high level 1 vs. low level 2 */
39 #define CEXPR_H1H2 256 /* high level 1 vs. high level 2 */
40 #define CEXPR_L1H1 512 /* low level 1 vs. high level 1 */
41 #define CEXPR_L2H2 1024 /* low level 2 vs. high level 2 */
|
| /linux-5.10/Documentation/userspace-api/media/dvb/ |
| D | ca_high_level.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 The High level CI API
10 This document describes the high level CI API as in accordance to the
14 With the High Level CI approach any new card with almost any random
33 .. code-block:: c
39 #define CA_CI 1 /* CI high level interface */
40 #define CA_CI_LINK 2 /* CI link layer level interface */
41 #define CA_CI_PHYS 4 /* CI physical layer level interface */
42 #define CA_DESCR 8 /* built-in descrambler */
50 This CI interface follows the CI high level interface, which is not
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| /linux-5.10/Documentation/driver-api/media/drivers/ |
| D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
34 3. High level hardware driver implementation which coordinates all
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
54 right now the V4L high level interface is the most complete, the
55 sysfs high level interface will work equally well for similar
57 possible to produce a DVB high level interface that can sit right
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| /linux-5.10/Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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| /linux-5.10/drivers/gpu/drm/panfrost/ |
| D | panfrost_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
12 #define GPU_L2_FEATURES 0x004 /* (RO) Level 2 cache features */
87 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
89 #define GPU_TILER_PRESENT_HI 0x114 /* (RO) Tiler core present bitmap, high word */
91 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
92 #define GPU_L2_PRESENT_HI 0x124 /* (RO) Level 2 cache present bitmap, high word */
99 #define GPU_STACK_PRESENT_HI 0xE04 /* (RO) Core stack present bitmap, high word */
102 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
105 #define TILER_READY_HI 0x154 /* (RO) Tiler core ready bitmap, high word */
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| /linux-5.10/include/media/ |
| D | cec-pin.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
30 * @received: optional. High-level CEC message callback. Allows the driver
39 void (*high)(struct cec_adapter *adap); member
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| /linux-5.10/Documentation/core-api/ |
| D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /linux-5.10/drivers/iio/adc/ |
| D | envelope-detector.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * The DAC is used to find the peak level of an alternating voltage input
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
63 int high; member
64 int level; member
73 * (one-bit memory) for if the interrupt has triggered since last calling
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| /linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 /* DRAM space - 1, size : 2 GB DRAM */
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| /linux-5.10/Documentation/driver-api/gpio/ |
| D | intro.rst | 16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
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| /linux-5.10/drivers/soc/fsl/qbman/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 Compiles in additional checks, to sanity-check the drivers and
30 tristate "BMan self-tests"
32 Compile the BMan self-test code. These tests will
37 bool "High-level API self-test"
41 This requires the presence of cpu-affine portals, and performs
42 high-level API testing with them (whichever portal(s) are affine
46 tristate "QMan self-tests"
48 Compile self-test code for QMan.
51 bool "QMan high-level self-test"
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| /linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
3 This optional 2nd level interrupt controller can be used in SMP configurations
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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| D | atmel,aic.txt | 4 - compatible: Should be:
5 - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
7 - "microchip,<chip>-aic" where <chip> can be "sam9x60"
9 - interrupt-controller: Identifies the node as an interrupt controller.
10 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
13 bits[3:0] trigger type and level flags:
14 1 = low-to-high edge triggered.
15 2 = high-to-low edge triggered.
16 4 = active high level-sensitive.
17 8 = active low level-sensitive.
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| D | img,pdc-intc.txt | 10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| D | open-pic.txt | 13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
42 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| /linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | gpio-wdt.txt | 1 * GPIO-controlled Watchdog
4 - compatible: Should contain "linux,wdt-gpio".
5 - gpios: From common gpio binding; gpio connection to WDT reset pin.
6 - hw_algo: The algorithm used by the driver. Should be one of the
8 - toggle: Either a high-to-low or a low-to-high transition clears
10 left floating or connected to a three-state buffer.
11 - level: Low or high level starts counting WDT timeout,
12 the opposite level disables the WDT. Active level is determined
14 - hw_margin_ms: Maximum time to reset watchdog circuit (milliseconds).
17 - always-running: If the watchdog timer cannot be disabled, add this flag to
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| /linux-5.10/include/linux/mfd/ |
| D | abx500.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2007-2009 ST-Ericsson AB
45 * struct abx500_res_to_temp - defines one point in a temp to res curve. To
57 * struct abx500_v_to_cap - Table for translating voltage to capacity
70 * struct abx500_fg_parameters - Fuel gauge algorithm parameters, in seconds
77 * @high_curr_time: Time current has to be high to go to recovery
79 * @accu_high_curr: FG accumulation time in high current mode
80 * @high_curr_threshold: High current threshold, in mA
122 * struct abx500_charger_maximization - struct used by the board config.
136 * struct abx500_battery_type - different batteries supported
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| /linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-nmk.txt | 4 - compatible : Should be "st,nomadik-gpio".
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller.
7 - #gpio-cells : Should be two:
10 - bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered.
12 2 = high-to-low edge triggered.
13 4 = active high level-sensitive.
14 8 = active low level-sensitive.
15 - gpio-controller : Marks the device node as a GPIO controller.
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| D | nvidia,tegra20-gpio.txt | 4 - compatible : "nvidia,tegra<chip>-gpio"
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller. For Tegra20,
9 - #gpio-cells : Should be two. The first cell is the pin number and the
11 - bit 0 specifies polarity (0 for normal, 1 for inverted)
12 - gpio-controller : Marks the device node as a GPIO controller.
13 - #interrupt-cells : Should be 2.
16 bits[3:0] trigger type and level flags:
17 1 = low-to-high edge triggered.
18 2 = high-to-low edge triggered.
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| D | gpio-zynq.txt | 2 -------------------------------------------
5 - #gpio-cells : Should be two
6 - First cell is the GPIO line number
7 - Second cell is used to specify optional
9 - compatible : Should be "xlnx,zynq-gpio-1.0" or
10 "xlnx,zynqmp-gpio-1.0" or "xlnx,versal-gpio-1.0
11 or "xlnx,pmc-gpio-1.0
12 - clocks : Clock specifier (see clock bindings for details)
13 - gpio-controller : Marks the device node as a GPIO controller.
14 - interrupts : Interrupt specifier (see interrupt bindings for
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| D | gpio-omap.txt | 4 - compatible:
5 - "ti,omap2-gpio" for OMAP2 controllers
6 - "ti,omap3-gpio" for OMAP3 controllers
7 - "ti,omap4-gpio" for OMAP4 controllers
8 - reg : Physical base address of the controller and length of memory mapped
10 - gpio-controller : Marks the device node as a GPIO controller.
11 - #gpio-cells : Should be two.
12 - first cell is the pin number
13 - second cell is used to specify optional parameters (unused)
14 - interrupt-controller: Mark the device node as an interrupt controller.
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| D | brcm,brcmstb-gpio.txt | 3 The controller's registers are organized as sets of eight 32-bit
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
16 - #gpio-cells:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
24 - brcm,gpio-bank-widths:
30 - interrupts:
33 - interrupts-extended:
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| /linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
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| /linux-5.10/fs/xfs/libxfs/ |
| D | xfs_btree.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2002,2005 Silicon Graphics, Inc.
48 /* Ensure we asked for crc for crc-only magics. */ in xfs_btree_magic()
61 int level, in __xfs_btree_check_lblock() argument
64 struct xfs_mount *mp = cur->bc_mp; in __xfs_btree_check_lblock()
65 xfs_btnum_t btnum = cur->bc_btnum; in __xfs_btree_check_lblock()
66 int crc = xfs_sb_version_hascrc(&mp->m_sb); in __xfs_btree_check_lblock()
69 if (!uuid_equal(&block->bb_u.l.bb_uuid, &mp->m_sb.sb_meta_uuid)) in __xfs_btree_check_lblock()
71 if (block->bb_u.l.bb_blkno != in __xfs_btree_check_lblock()
72 cpu_to_be64(bp ? bp->b_bn : XFS_BUF_DADDR_NULL)) in __xfs_btree_check_lblock()
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