| /linux/Documentation/hwmon/ |
| H A D | sis5595.rst | 10 Addresses scanned: ISA in PCI-space encoded address
18 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
19 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
20 - Aurelien Jarno <aurelien@aurel32.net> 2.6 port
22 SiS southbridge has a LM78-like chip integrated on the same IC.
28 Version PCI ID PCI Revision
36 "blacklist" PCI ID and refuse to load.
39 NOT SUPPORTED PCI ID BLACKLIST PCI ID
55 -----------------
69 -----------
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,vexpress-juno.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <sudeep.holla@arm.com>
11 - Linus Walleij <linus.walleij@linaro.org>
15 multicore Cortex-A class systems. The Versatile Express family contains both
37 further subvariants are released of the core tile, even more fine-granular
45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
46 in MPCore configuration in a test chip on the core tile. See ARM
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| /linux/drivers/mtd/nand/raw/ |
| H A D | nand_micron.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
14 * Special Micron status bit 3 indicates that the block has been
15 * corrected by on-die ECC and should be rewritten.
20 * On chips with 8-bit ECC and additional bit can be used to distinguish
24 * ----- ----- ----- -----------
27 * 0 1 0 4 - 6 errors corrected, recommend rewrite
29 * 1 0 0 1 - 3 errors corrected
31 * 1 1 0 7 - 8 errors corrected, recommend rewrite
69 static int micron_nand_setup_read_retry(struct nand_chip *chip, int retry_mode) in micron_nand_setup_read_retry() argument
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| /linux/sound/isa/ |
| H A D | es18xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) by Christian Fischbach <fishbach@pool.informatik.rwth-aachen.de>
5 * Copyright (c) by Abramo Bagnara <abramo@alsa-project.org>
10 * - There are pops (we can't delay in trigger function, cause midlevel
13 * - Support for 16 bit DMA seems to be broken. I've no hardware to tune it.
18 * - The chip has one half duplex pcm (with very limited full duplex support).
20 * - Duplex stereophonic sound is impossible.
21 * - Record and playback must share the same frequency rate.
23 * - The driver use dma2 for playback and dma1 for capture.
29 * - there are a first full duplex pcm and a second playback only pcm
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| /linux/sound/isa/sb/ |
| H A D | sb16.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ variable
45 static bool isapnp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
56 static int mic_agc[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
61 static int seq_ports[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4};
66 module_param_array(id, charp, NULL, 0444);
67 MODULE_PARM_DESC(id, "ID string for SoundBlaster 16 soundcard.");
77 MODULE_PARM_DESC(mpu_port, "MPU-401 port # for SB16 driver.");
87 MODULE_PARM_DESC(dma8, "8-bit DMA # for SB16 driver.");
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| /linux/include/uapi/linux/ |
| H A D | gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
3 * <linux/gpio.h> - userspace ABI for the GPIO character devices
21 * Must be a multiple of 8 to ensure 32/64-bit alignment of structs.
26 * struct gpiochip_info - Information about a certain GPIO chip
27 * @name: the Linux kernel name of this GPIO chip
28 * @label: a functional name for this GPIO chip, such as a product
30 * @lines: number of GPIO lines on this chip
41 * Must be no greater than 64, as bitmaps are restricted here to 64-bits
42 * for simplicity, and a multiple of 2 to ensure 32/64-bit alignment of
54 * enum gpio_v2_line_flag - &struct gpio_v2_line_attribute.flags values
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| /linux/drivers/hwmon/pmbus/ |
| H A D | fsp-3y.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Hardware monitoring driver for FSP 3Y-Power PSUs
8 * David Brownell (and later adopted by Jan Kundrát). The device has some sort of a timing issue
38 int chip; member
46 static int page_log_to_page_real(int page_log, enum chips chip) in page_log_to_page_real() argument
48 switch (chip) { in page_log_to_page_real()
56 return -EINVAL; in page_log_to_page_real()
66 return -EINVAL; in page_log_to_page_real()
69 return -EINVAL; in page_log_to_page_real()
82 page_real = page_log_to_page_real(page_log, data->chip); in set_page()
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| /linux/drivers/gpio/ |
| H A D | gpiolib.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct gpio_device - internal state container for GPIO devices
29 * @id: numerical ID number for the GPIO chip
31 * @chip: pointer to the corresponding gpiochip, holding static
35 * used from the chip.
39 * @can_sleep: indicate whether the GPIO chip driver's callbacks can sleep
44 * or name of the IP component in a System on Chip.
45 * @data: per-instance data assigned by the driver
49 * @line_state_lock: RW-spinlock protecting the line state notifier
54 * @srcu: protects the pointer to the underlying GPIO chip
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| H A D | gpio-max732x.c | 1 // SPDX-License-Identifier: GPL-2.0-only
26 * - Push Pull Output
27 * - Input
28 * - Open Drain I/O
37 * - Group A : by I2C address 0b'110xxxx
38 * - Group B : by I2C address 0b'101xxxx
52 * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
57 #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
59 #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
71 #define INT_NO_MASK 0x1 /* Has interrupts, no mask */
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| /linux/drivers/mux/ |
| H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #define pr_fmt(fmt) "mux-core: " fmt
25 * The idle-as-is "state" is not an actual state that may be selected, it
32 * struct mux_state - Represents a mux controller state specific to a given
37 * This structure is specific to the consumer that acquires it and has
67 ida_free(&mux_ida, mux_chip->id); in mux_chip_release()
72 .name = "mux-chip",
77 * mux_chip_alloc() - Allocate a mux-chip.
79 * @controllers: The number of mux controllers to allocate for this chip.
82 * After allocating the mux-chip with the desired number of mux controllers
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| /linux/Documentation/devicetree/bindings/timestamp/ |
| H A D | nvidia,tegra194-hte.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra on chip generic hardware timestamping engine (HTE) provider
10 - Dipen Patel <dipenp@nvidia.com>
13 Tegra SoC has two instances of generic hardware timestamping engines (GTE)
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
16 timestamp (taken from system counter) in its internal hardware FIFO. It has
24 - nvidia,tegra194-gte-aon
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| /linux/sound/usb/6fire/ |
| H A D | chip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include "chip.h"
30 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-max */
31 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* Id for card */ variable
38 module_param_array(id, charp, NULL, 0444);
39 MODULE_PARM_DESC(id, "ID string for the 6fire sound device.");
45 static void usb6fire_chip_abort(struct sfire_chip *chip) in usb6fire_chip_abort() argument
47 if (chip) { in usb6fire_chip_abort()
48 if (chip->pcm) in usb6fire_chip_abort()
49 usb6fire_pcm_abort(chip); in usb6fire_chip_abort()
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| /linux/Documentation/devicetree/bindings/mips/ |
| H A D | mscc.txt | 7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
12 o CPU chip regs:
14 The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
15 functionalities: chip ID, general purpose register for software use, reset
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
20 - reg : Should contain registers location and length
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
30 The SoC has a few registers (HSIO) handling miscellaneous functionalities:
35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
36 - reg : Should contain registers location and length
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | sprd,spi-adi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
16 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
20 ADI controller has 50 channels including 2 software read/write channels and
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| /linux/Documentation/devicetree/bindings/arm/amlogic/ |
| H A D | amlogic,meson-gx-ao-secure.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
22 const: amlogic,meson-gx-ao-secure
24 - compatible
29 - items:
30 - const: amlogic,meson-gx-ao-secure
31 - const: syscon
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | mediatek,gce-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Houlong Wei <houlong.wei@mediatek.com>
13 The Global Command Engine (GCE) is an instruction based, multi-threaded,
14 single-core command dispatcher for MediaTek hardware. The Command Queue
18 We use mediatek,gce-mailbox.yaml to define the properties for CMDQ mailbox
28 mediatek,gce-events:
30 GCE has an event table in SRAM, consisting of 1024 event IDs (0~1023).
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| /linux/drivers/char/tpm/ |
| H A D | tpm_infineon.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * Sirrix AG - security technologies <tpmdd@sirrix.com> and
10 * Applied Data Security Group, Ruhr-University Bochum, Germany
11 * Project-Homepage: http://www.trust.rub.de/projects/linux-device-driver-infineon-tpm/
19 /* maximum number of WTX-packages */
21 /* msleep-Time for WTX-packages */
23 /* msleep-Time --> Interval to check status register */
25 /* gives number of max. msleep()-calls before throwing timeout */
150 static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo) in empty_fifo() argument
169 this has nothing to say, since the TPM will give its answer in empty_fifo()
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| /linux/sound/mips/ |
| H A D | sgio2audio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
15 #include <linux/dma-mapping.h>
33 MODULE_AUTHOR("Vivien Chappelier <vivien.chappelier@linux-mips.org>");
37 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
38 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ variable
42 module_param(id, charp, 0444);
43 MODULE_PARM_DESC(id, "ID string for SGI O2 soundcard.");
66 #define CHANNEL_RING_MASK (CHANNEL_RING_SIZE - 1)
79 /* definition of the chip-specific record */
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| /linux/Documentation/devicetree/bindings/devfreq/event/ |
| H A D | samsung,exynos-nocp.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-nocp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos NoC (Network on Chip) Probe
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus.
16 that the Network on Chip (NoC) probes detects are transported over the
19 traffic debug or statistic collectors. Exynos542x bus has multiple NoC probes
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
63 dimms, accessed at the same time. E. g. if the DIMM is 64 bits-wide (72
67 * Chip-select row
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| H A D | pwm.rst | 15 ----------------
19 Instead of referring to a PWM device via its unique ID, board setup code
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
36 ----------
42 After being requested, a PWM has to be configured using::
64 maintain the power output but has more freedom regarding signal form.
66 EMI by phase shifting the individual channels of a chip.
76 different to what the driver has actually implemented if the request cannot be
82 PWM arguments are usually platform-specific and allows the PWM user to only
93 -----------------------------------
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-jz4780-efuse | 1 What: /sys/devices/*/<our-device>/nvmem
4 Description: read-only access to the efuse on the Ingenic JZ4780 SoC
5 The SoC has a one time programmable 8K efuse that is
11 0x008 128 bit Ingenic Chip ID
12 0x018 128 bit Customer ID
19 Users: any user space application which wants to read the Chip
20 and Customer ID
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| /linux/sound/pci/ |
| H A D | bt87x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
27 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
28 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ variable
35 module_param_array(id, charp, NULL, 0444);
36 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
70 #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
93 #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
131 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
201 static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg) in snd_bt87x_readl() argument
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| /linux/include/linux/platform_data/ |
| H A D | brcmfmac.h | 34 * Note: the brcmfmac can be loaded as module or be statically built-in into
35 * the kernel. If built-in then do note that it uses module_init (and
38 * it built-in to the kernel then use a higher initcall then device_initcall
48 * enum brcmf_bus_type - Bus type identifier. Currently SDIO, USB and PCIE are
59 * struct brcmfmac_sdio_pd - SDIO Device specific platform data.
69 * in-band interrupts are relatively slow and for having
78 * Set this to true if the SDIO host controller has higher
87 * this is fully functional. This function is chip/module
89 * complete reset has completed.
104 * struct brcmfmac_pd_cc_entry - Struct for translating user space country code
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| /linux/arch/x86/kernel/apic/ |
| H A D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
31 irq_data_get_irq_chip(irqd)->irq_write_msi_msg(irqd, msg); in irq_msi_update_msg()
38 struct irq_data *parent = irqd->parent_data; in msi_set_affinity()
47 ret = parent->chip->irq_set_affinity(parent, mask, force); in msi_set_affinity()
52 * For non-maskable and non-remapped MSI interrupts the migration in msi_set_affinity()
53 * to a different destination CPU and a different vector has to be in msi_set_affinity()
55 * caused by the non-atomic update of the address/data pair. in msi_set_affinity()
58 * - The MSI is maskable (remapped MSI does not use this code path). in msi_set_affinity()
60 * - The new vector is the same as the old vector in msi_set_affinity()
61 * - The old vector is MANAGED_IRQ_SHUTDOWN_VECTOR (interrupt starts up) in msi_set_affinity()
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