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/linux-5.10/include/uapi/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
44 #define BMCR_FULLDPLX 0x0100 /* Full duplex */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
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Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
62 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
63 #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */
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/linux-5.10/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
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/linux-5.10/Documentation/networking/device_drivers/ethernet/intel/
De1000.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999 - 2013 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Speed and Duplex Configuration
16 - Additional Configurations
17 - Support
40 For more information about the AutoNeg, Duplex, and Speed
41 parameters, see the "Speed and Duplex Configuration" section in
50 -------
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/linux-5.10/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_param.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define OPTION_UNSET -1
17 * TxDescriptors - Transmit Descriptor Count
18 * @Valid Range: PCH_GBE_MIN_TXD - PCH_GBE_MAX_TXD
26 * RxDescriptors -Receive Descriptor Count
27 * @Valid Range: PCH_GBE_MIN_RXD - PCH_GBE_MAX_RXD
35 * Speed - User Specified Speed Override
37 * - 0: auto-negotiate at all supported speeds
38 * - 10: only link at 10 Mbps
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Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
36 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
57 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
58 #define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
59 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
60 #define MII_SR_10T_FD_CAPS 0x1000 /* 10T Full Duplex Capable */
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/linux-5.10/Documentation/networking/device_drivers/ethernet/ti/
Dtlan.rst1 .. SPDX-License-Identifier: GPL-2.0
9 (C) 1997-1998 Caldera, Inc.
13 (C) 1999-2001 Torben Mathiasen <tmm@image.dk, torben.mathiasen@compaq.com>
41 108d 0012 Olicom OC-2325
42 108d 0013 Olicom OC-2183
43 108d 0014 Olicom OC-2326
81 3. You can set duplex=1 to force half duplex, and duplex=2 to
82 force full duplex.
89 5. You have to use speed=X duplex=Y together now. If you just
90 do "insmod tlan.o speed=100" the driver will do Auto-Neg.
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/linux-5.10/Documentation/networking/device_drivers/ethernet/dlink/
Ddl2k.rst1 .. SPDX-License-Identifier: GPL-2.0
4 D-Link DL2000-based Gigabit Ethernet Adapter Installation
11 - Compatibility List
12 - Quick Install
13 - Compiling the Driver
14 - Installing the Driver
15 - Option parameter
16 - Configuration Script Sample
17 - Troubleshooting
25 - D-Link DGE-550T Gigabit Ethernet Adapter.
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/linux-5.10/drivers/net/ethernet/intel/e1000/
De1000_param.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
12 #define OPTION_UNSET -1
30 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
31 * Valid Range: 80-4096 for 82544 and newer
39 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
40 * Valid Range: 80-4096 for 82544 and newer
49 * - 0 - auto-negotiate at all supported speeds
50 * - 10 - only link at 10 Mbps
51 * - 100 - only link at 100 Mbps
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/linux-5.10/drivers/net/ethernet/intel/igc/
Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
7 * igc_check_reset_block - Check if PHY reset is blocked
25 * igc_get_phy_id - Retrieve the PHY ID and revision
33 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
37 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
41 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
43 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
47 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
48 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
55 * igc_phy_has_link - Polls PHY for link
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/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Daltr_tse_pcs.c1 // SPDX-License-Identifier: GPL-2.0-only
84 dev_err(pcs->dev, "PCS could not get out of sw reset\n"); in tse_pcs_reset()
85 return -ETIMEDOUT; in tse_pcs_reset()
105 pcs->sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG); in tse_pcs_init()
113 void __iomem *tse_pcs_base = pcs->tse_pcs_base; in pcs_link_timer_callback()
114 void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base; in pcs_link_timer_callback()
120 dev_dbg(pcs->dev, "Adapter: Link is established\n"); in pcs_link_timer_callback()
124 mod_timer(&pcs->aneg_link_timer, jiffies + in pcs_link_timer_callback()
133 u16 duplex = 0; in auto_nego_timer_callback() local
134 void __iomem *tse_pcs_base = pcs->tse_pcs_base; in auto_nego_timer_callback()
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/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-ocelot-serdes.txt2 -------------------------------------
13 half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
14 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
19 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
24 - compatible: should be "mscc,vsc7514-serdes"
25 - #phy-cells : from the generic phy bindings, must be 2.
28 defined in dt-bindings/phy/phy-ocelot-serdes.h
33 compatible = "mscc,vsc7514-serdes";
34 #phy-cells = <2>;
39 phy-handle = <&phy_foo>;
/linux-5.10/drivers/net/usb/
Dgl620a.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GeneSys GL620USB-A based links
4 * Copyright (C) 2001 by Jiun-Jie Huang <huangjj@genesyslogic.com.tw>
23 * GeneSys GL620USB-A (www.genesyslogic.com.tw)
29 * - GL620USB-A is full duplex; GL620USB is only half duplex for bulk.
30 * (Some cables, like the BAFO-100c, use the half duplex version.)
31 * - For the full duplex model, the low bit of the version code says
33 * - For the half duplex type, a control/interrupt handshake settles
37 * Original code from Jiun-Jie Huang <huangjj@genesyslogic.com.tw>
76 if (skb->len < dev->net->hard_header_len) in genelink_rx_fixup()
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/linux-5.10/Documentation/spi/
Dspidev.rst5 SPI devices have a limited userspace API, supporting basic half-duplex
7 full duplex transfers and device I/O configuration are also available.
19 * Prototyping in an environment that's not crash-prone; stray pointers
73 Since this is a standard Linux device driver -- even though it just happens
74 to expose a low level API to userspace -- it can be associated with any number
84 Standard read() and write() operations are obviously only half-duplex, and
85 the chipselect is deactivated between those operations. Full-duplex access,
86 and composite operation without chipselect de-activation, is available using
109 transfer SPI words. Zero indicates MSB-first; other values indicate
110 the less common LSB-first encoding. In both cases the specified value
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/linux-5.10/Documentation/networking/device_drivers/ethernet/3com/
D3c509.rst1 .. SPDX-License-Identifier: GPL-2.0
21 ethercards in Linux. These cards are commonly known by the most widely-used
22 card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
23 be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
28 - 3c509 (original ISA card)
29 - 3c509B (later revision of the ISA card; supports full-duplex)
30 - 3c589 (PCMCIA)
31 - 3c589B (later revision of the 3c589; supports full-duplex)
32 - 3c579 (EISA)
45 The driver allows boot- or load-time overriding of the card's detected IOADDR,
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Dvortex.rst1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
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/linux-5.10/drivers/net/ethernet/dec/tulip/
Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
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/linux-5.10/Documentation/networking/device_drivers/ethernet/dec/
Ddmfe.rst1 .. SPDX-License-Identifier: GPL-2.0
26 dmfe: Davicom DM9xxx net driver, version 1.36.4 (2002-01-17)
35 insmod dmfe mode=0 # Force 10M Half Duplex
36 insmod dmfe mode=1 # Force 100M Half Duplex
37 insmod dmfe mode=4 # Force 10M Full Duplex
38 insmod dmfe mode=5 # Force 100M Full Duplex
56 - Implement pci_driver::suspend() and pci_driver::resume() power management methods.
57 - Check on 64 bit boxes.
58 - Check and fix on big endian boxes.
59 - Test and make sure PCI latency is now correct for all cases.
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/linux-5.10/net/ethtool/
Dlinkmodes.c1 // SPDX-License-Identifier: GPL-2.0-only
31 struct net_device *dev = reply_base->dev; in linkmodes_prepare_data()
34 data->lsettings = &data->ksettings.base; in linkmodes_prepare_data()
40 ret = __ethtool_get_link_ksettings(dev, &data->ksettings); in linkmodes_prepare_data()
46 data->peer_empty = in linkmodes_prepare_data()
47 bitmap_empty(data->ksettings.link_modes.lp_advertising, in linkmodes_prepare_data()
59 const struct ethtool_link_ksettings *ksettings = &data->ksettings; in linkmodes_reply_size()
60 const struct ethtool_link_settings *lsettings = &ksettings->base; in linkmodes_reply_size()
61 bool compact = req_base->flags & ETHTOOL_FLAG_COMPACT_BITSETS; in linkmodes_reply_size()
68 ret = ethnl_bitset_size(ksettings->link_modes.advertising, in linkmodes_reply_size()
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/linux-5.10/Documentation/devicetree/bindings/net/
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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/linux-5.10/Documentation/driver-api/serial/
Dserial-rs485.rst8 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the
15 2. Hardware-related Considerations
18 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in
19 half-duplex mode capable of automatically controlling line direction by
21 half-duplex hardware like an RS485 transceiver or any RS232-connected
22 half-duplex devices like some modems.
26 available at user-level to allow switching from one mode to the other, and
46 4. Usage from user-level
49 From user-level, RS485 configuration can be get/set using the previous
/linux-5.10/Documentation/devicetree/bindings/serial/
Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
22 - description: Delay between rts signal and beginning of data sent in
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/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-pl022.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: "spi-controller.yaml#"
22 - compatible
27 - const: arm,pl022
28 - const: arm,primecell
39 clock-names:
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/linux-5.10/drivers/net/ethernet/ibm/ehea/
Dehea_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Jan-Bernd Themann <themann@de.ibm.com>
34 switch (port->port_speed) { in ehea_get_link_ksettings()
48 speed = -1; in ehea_get_link_ksettings()
51 cmd->base.duplex = port->full_duplex == 1 ? in ehea_get_link_ksettings()
55 cmd->base.duplex = DUPLEX_UNKNOWN; in ehea_get_link_ksettings()
57 cmd->base.speed = speed; in ehea_get_link_ksettings()
59 if (cmd->base.speed == SPEED_10000) { in ehea_get_link_ksettings()
62 cmd->base.port = PORT_FIBRE; in ehea_get_link_ksettings()
70 cmd->base.port = PORT_TP; in ehea_get_link_ksettings()
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/linux-5.10/drivers/net/
Dsungem_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
10 * - Add support for PHYs that provide an IRQ line
11 * - Eventually moved the entire polling state machine in
14 * - On LXT971 & BCM5201, Apple uses some chip specific regs
17 * - Apple has some additional power management code for some
42 { 0, 0, 0 }, /* 10BT Half Duplex */
43 { 1, 0, 0 }, /* 10BT Full Duplex */
44 { 0, 1, 0 }, /* 100BT Half Duplex */
45 { 0, 1, 0 }, /* 100BT Half Duplex */
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