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/linux-3.3/arch/arm/mach-omap2/
Dmux.h3 * Copyright (C) 2009-2010 Texas Instruments
17 /* 34xx mux mode options for each pin. See TRM for options */
27 /* 24xx/34xx mux bit defines */
32 /* 34xx specific mux bit defines */
41 /* 44xx specific mux bit defines */
65 #define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
66 #define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
67 #define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
68 #define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
69 #define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */
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Dmux.c2 * linux/arch/arm/mach-omap2/mux.c
6 * Copyright (C) 2004 - 2010 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43 #include "mux.h"
50 struct omap_mux mux; member
62 if (!strcmp(name, partition->name)) in omap_mux_get()
71 if (partition->flags & OMAP_MUX_REG_8BIT) in omap_mux_read()
72 return __raw_readb(partition->base + reg); in omap_mux_read()
74 return __raw_readw(partition->base + reg); in omap_mux_read()
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Dboard-am3517crane.c8 * Based on mach-omap2/board-am3517evm.c
22 #include <linux/gpio.h>
25 #include <asm/mach-types.h>
33 #include "mux.h"
57 .reset_gpio_port[1] = -EINVAL,
58 .reset_gpio_port[2] = -EINVAL
72 /* Configure GPIO for EHCI port */ in am3517_crane_init()
74 pr_err("Can not configure mux for GPIO_USB_NRESET %d\n", in am3517_crane_init()
80 pr_err("Can not configure mux for GPIO_USB_POWER %d\n", in am3517_crane_init()
88 pr_err("Can not request GPIO %d\n", GPIO_USB_POWER); in am3517_crane_init()
/linux-3.3/drivers/i2c/muxes/
Dgpio-i2cmux.c2 * I2C multiplexer using GPIO API
12 #include <linux/i2c-mux.h>
13 #include <linux/gpio-i2cmux.h>
18 #include <linux/gpio.h>
26 static void gpiomux_set(const struct gpiomux *mux, unsigned val) in gpiomux_set() argument
30 for (i = 0; i < mux->data.n_gpios; i++) in gpiomux_set()
31 gpio_set_value(mux->data.gpios[i], val & (1 << i)); in gpiomux_set()
36 struct gpiomux *mux = data; in gpiomux_select() local
38 gpiomux_set(mux, mux->data.values[chan]); in gpiomux_select()
45 struct gpiomux *mux = data; in gpiomux_deselect() local
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DKconfig9 tristate "GPIO-based I2C multiplexer"
13 GPIO based I2C multiplexer. This driver provides access to
14 I2C busses connected through a MUX, which is controlled
15 through GPIO pins.
18 will be called gpio-i2cmux.
31 tristate "Philips PCA954x I2C Mux/switches"
35 I2C mux/switch devices.
/linux-3.3/Documentation/i2c/muxes/
Dgpio-i2cmux1 Kernel driver gpio-i2cmux
6 -----------
8 gpio-i2cmux is an i2c mux driver providing access to I2C bus segments
9 from a master I2C bus and a hardware MUX controlled through GPIO pins.
13 ---------- ---------- Bus segment 1 - - - - -
14 | | SCL/SDA | |-------------- | |
15 | |------------| |
17 | Linux | GPIO 1..N | MUX |--------------- Devices
18 | |------------| | | |
20 | | | |---------------| |
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/linux-3.3/include/linux/
Dgpio-i2cmux.h2 * gpio-i2cmux interface to platform code
14 /* MUX has no specific idle mode */
15 #define GPIO_I2CMUX_NO_IDLE ((unsigned)-1)
18 * struct gpio_i2cmux_platform_data - Platform-dependent data for gpio-i2cmux
21 * @values: Array of bitmasks of GPIO settings (low/high) for each
24 * @gpios: Array of GPIO numbers used to control MUX
25 * @n_gpios: Number of GPIOs used to control MUX
26 * @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used
/linux-3.3/include/linux/pinctrl/
Dpinmux.h4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
27 * struct pinmux_ops - pinmux operations, to be implemented by pin controller
31 * before selecting any actual mux setting across a function. The driver
37 * repeatedly as long as it returns >= 0 to enumerate mux settings
39 * called by the core to figure out which mux setting it shall map a
53 * @gpio_request_enable: requests and enables GPIO on a certain pin.
54 * Implement this only if you can mux every pin individually as GPIO. The
55 * affected GPIO range is passed along with an offset(pin number) into that
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/linux-3.3/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_reg.h2 * Copyright 2004 - 2008 Broadcom Corporation. All rights reserved.
63 uint32_t PLLPreDivider; /* PLL pre-divider control register (PLL1) */
79 uint32_t PLLPreDivider2; /* PLL pre-divider control register (PLL2) */
101 uint32_t LcdPifMode; /* LCD/PIF Pin Sharing MUX Mode */
112 uint32_t GpioSR_0_7; /* Slew rate for GPIO 0 - 7 */
113 uint32_t GpioSR_8_15; /* Slew rate for GPIO 8 - 15 */
114 uint32_t GpioSR_16_23; /* Slew rate for GPIO 16 - 23 */
115 uint32_t GpioSR_24_31; /* Slew rate for GPIO 24 - 31 */
116 uint32_t GpioSR_32_39; /* Slew rate for GPIO 32 - 39 */
117 uint32_t GpioSR_40_47; /* Slew rate for GPIO 40 - 47 */
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/linux-3.3/Documentation/
Dpinctrl.txt6 - Enumerating and naming controllable pins
8 - Multiplexing of pins, pads, fingers (etc) see below for details
10 - Configuration of pins, pads, fingers (etc), such as software-controlled
11 biasing and driving mode specific pins, such as pull-up/down, open drain,
14 Top-level interface
19 - A pin controller is a piece of hardware, usually a set of registers, that
25 - PINS are equal to pads, fingers, balls or whatever packaging input or
29 be sparse - i.e. there may be gaps in the space with numbers where no
91 See for example arch/arm/mach-u300/Kconfig for an example.
100 also consider matching of offsets to the GPIO ranges that may be handled by
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/linux-3.3/arch/arm/mach-pxa/
Dmfp-pxa2xx.c2 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
4 * PXA2xx pin mux configuration support
15 #include <linux/gpio.h>
16 #include <linux/gpio-pxa.h>
22 #include <mach/pxa2xx-regs.h>
23 #include <mach/mfp-pxa2xx.h>
32 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
44 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
52 static int __mfp_config_gpio(unsigned gpio, unsigned long c) in __mfp_config_gpio() argument
54 unsigned long gafr, mask = GPIO_bit(gpio); in __mfp_config_gpio()
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/linux-3.3/arch/arm/mach-davinci/
Dboard-da830-evm.c5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
16 #include <linux/gpio.h>
26 #include <asm/mach-types.h>
30 #include <mach/mux.h>
39 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
46 -1
79 "OHCI over-current indicator", NULL); in da830_evm_usb_ocic_notify()
82 "over-current indicator changes\n", __func__); in da830_evm_usb_ocic_notify()
130 * host-only mode -- ID pin will float if no cable is connected, so the in da830_evm_usb_init()
131 * controller won't be able to drive VBUS thinking that it's a B-device. in da830_evm_usb_init()
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Dboard-da850-evm.c2 * TI DA850/OMAP-L138 EVM board
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
22 #include <linux/gpio.h>
31 #include <linux/input/tps6507x-ts.h>
37 #include <asm/mach-types.h>
43 #include <mach/mux.h>
47 #define DA850_EVM_PHY_ID "davinci_mdio-0:00"
67 .name = "U-Boot",
73 .name = "U-Boot-Env",
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Dboard-dm365-evm.c31 #include <asm/mach-types.h>
34 #include <mach/mux.h>
57 #define DM365_EVM_PHY_ID "davinci_mdio-0:01"
59 * A MAX-II CPLD is used for various board control functions.
107 /* UBL (a few copies) plus U-Boot */
111 .mask_flags = MTD_WRITEABLE, /* force read-only */
113 /* U-Boot environment */
149 .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
153 .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
234 return -ENXIO; in cpld_mmc_get_cd()
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Dboard-omapl138-hawk.c2 * Hawkboard.org based on TI's OMAP-L138 Platform
6 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
15 #include <linux/gpio.h>
17 #include <asm/mach-types.h>
22 #include <mach/mux.h>
24 #define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
37 -1
51 pr_warning("%s: cpgmac/mii mux setup failed: %d\n", in omapl138_hawk_config_emac()
60 soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; in omapl138_hawk_config_emac()
70 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
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/linux-3.3/Documentation/video4linux/bttv/
DSound-FAQ11 bttv-cards.c, which holds the information required for each board.
42 Below is a do-it-yourself description for you.
54 receiver chips. Some boards use the i2c bus instead of the gpio pins
55 to connect the mux chip.
68 gpiomask specifies which pins are used to control the audio mux chip.
76 mux.
89 You can have a look at the board to see which of the gpio pins are
90 connected at all and then start trial-and-error ...
94 make the gpio debugging easier:
96 bttv_gpio=0/1 enable/disable gpio debug messages
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/linux-3.3/sound/soc/codecs/
Dtlv320aic3x.c20 * ---------------------------------------
21 * MONO_LOUT -> N/A | MONO_LOUT -> N/A
22 * | IN1L -> LINE1L
23 * | IN1R -> LINE1R
24 * | IN2L -> LINE2L
25 * | IN2R -> LINE2R
26 * | MIC3L/R -> N/A
29 * ---------------------------------------
41 #include <linux/gpio.h>
126 * wanting to read volatile bits from those registers that has both read-only
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Dwm9713.c2 * wm9713.c -- ALSA Soc WM9713 codec support
12 * Features:-
96 SOC_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux), /* record mux hp 1 */
97 SOC_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux), /* record mux mono 2 */
98 SOC_ENUM_SINGLE(AC97_VIDEO, 3, 8, wm9713_rec_src), /* record mux left 3 */
99 SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/
117 static const DECLARE_TLV_DB_SCALE(out_tlv, -4650, 150, 0);
118 static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
119 static const DECLARE_TLV_DB_SCALE(misc_tlv, -1500, 300, 0);
207 SOC_SINGLE("Bass Cut-off Switch", AC97_GENERAL_PURPOSE, 12, 1, 1),
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/linux-3.3/drivers/pinctrl/
Dpinmux.c4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
19 #include <linux/radix-tree.h>
41 * struct pinmux_group - group list item for pinmux groups
51 * struct pinmux - per-device pinmux state holder
54 * @usecount: the number of active users of this mux setting, used to keep
76 * struct pinmux_hog - a list item to stash mux hogs
88 * pin_request() - request a single pin to be muxed in, typically for GPIO
91 * so it knows what function to mux in, e.g. the string "gpioNN"
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/linux-3.3/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c15 #include <linux/gpio.h>
27 { .compatible = "fsl,mpc5200-xlb", },
28 { .compatible = "mpc5200-xlb", },
32 { .compatible = "fsl,mpc5200-immr", },
33 { .compatible = "fsl,mpc5200b-immr", },
34 { .compatible = "simple-bus", },
73 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
74 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
79 * transaction and re-enable it afterwards ...) in mpc5200_setup_xlb_arbiter()
83 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
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/linux-3.3/arch/arm/mach-pnx4008/
Dgpio.c2 * arch/arm/mach-pnx4008/gpio.c
4 * PNX4008 GPIO driver
22 #include <mach/gpio-pnx4008.h>
52 static inline int gpio_read_bit(u32 reg, int gpio) in gpio_read_bit() argument
55 int ret = -EFAULT; in gpio_read_bit()
57 if (gpio < 0) in gpio_read_bit()
60 bit = GPIO_BIT(gpio); in gpio_read_bit()
69 static inline int gpio_set_bit(u32 reg, int gpio) in gpio_set_bit() argument
72 int ret = -EFAULT; in gpio_set_bit()
74 if (gpio < 0) in gpio_set_bit()
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/linux-3.3/Documentation/arm/pxa/
Dmfp.txt5 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
12 Unlike the GPIO alternate function settings on PXA25x and PXA27x, a new MFP
13 mechanism is introduced from PXA3xx to completely move the pin-mux functions
14 out of the GPIO controller. In addition to pin-mux configurations, the MFP
15 also controls the low power state, driving strength, pull-up/down and event
19 +--------+
20 | |--(GPIO19)--+
21 | GPIO | |
22 | |--(GPIO...) |
23 +--------+ |
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/linux-3.3/arch/arm/plat-samsung/include/plat/
Daudio.h1 /* arch/arm/plat-samsung/include/plat/audio.h
13 * of GPIO for AC97 pins
22 * of GPIO for S/PDIF pins
34 * If the I2S block has no internal prescalar or MUX (I2SMOD[10] bit)
51 * struct s3c_audio_pdata - common platform data for audio device drivers
52 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
/linux-3.3/arch/arm/mach-at91/
Dgpio.c2 * linux/arch/arm/mach-at91/gpio.c
14 #include <linux/gpio.h>
86 /*--------------------------------------------------------------------------*/
103 * mux the pin to the "GPIO" peripheral role.
111 return -EINVAL; in at91_set_GPIO_periph()
121 * mux the pin to the "A" internal peripheral role.
129 return -EINVAL; in at91_set_A_periph()
141 * mux the pin to the "B" internal peripheral role.
149 return -EINVAL; in at91_set_B_periph()
161 * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
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/linux-3.3/Documentation/devicetree/bindings/gpio/
Dgpio-samsung.txt1 Samsung Exynos4 GPIO Controller
4 - compatible: Compatible property value should be "samsung,exynos4-gpio>".
6 - reg: Physical base address of the controller and length of memory mapped
9 - #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
11 <[phandle of the gpio controller node]
12 [pin number within the gpio controller]
13 [mux function]
17 Values for gpio specifier:
18 - Pin number: is a value between 0 to 7.
19 - Pull Up/Down: 0 - Pull Up/Down Disabled.
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