| /linux-3.3/arch/arm/mach-bcmring/include/mach/csp/ |
| D | chipcHw_reg.h | 2 * Copyright 2004 - 2008 Broadcom Corporation. All rights reserved.
34 uint32_t DDRClock; /* PLL1 Channel 1 for DDR clock */
35 uint32_t ARMClock; /* PLL1 Channel 2 for ARM clock */
36 uint32_t ESWClock; /* PLL1 Channel 3 for ESW system clock */
37 uint32_t VPMClock; /* PLL1 Channel 4 for VPM clock */
38 uint32_t ESW125Clock; /* PLL1 Channel 5 for ESW 125MHz clock */
39 uint32_t UARTClock; /* PLL1 Channel 6 for UART clock */
40 uint32_t SDIO0Clock; /* PLL1 Channel 7 for SDIO 0 clock */
41 uint32_t SDIO1Clock; /* PLL1 Channel 8 for SDIO 1 clock */
42 uint32_t SPIClock; /* PLL1 Channel 9 for SPI master Clock */
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| /linux-3.3/arch/powerpc/platforms/52xx/ |
| D | mpc52xx_common.c | 15 #include <linux/gpio.h>
27 { .compatible = "fsl,mpc5200-xlb", },
28 { .compatible = "mpc5200-xlb", },
32 { .compatible = "fsl,mpc5200-immr", },
33 { .compatible = "fsl,mpc5200b-immr", },
34 { .compatible = "simple-bus", },
73 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
74 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
79 * transaction and re-enable it afterwards ...) in mpc5200_setup_xlb_arbiter()
83 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
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| /linux-3.3/arch/arm/mach-davinci/ |
| D | board-da830-evm.c | 5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
16 #include <linux/gpio.h>
26 #include <asm/mach-types.h>
30 #include <mach/mux.h>
39 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
46 -1
79 "OHCI over-current indicator", NULL); in da830_evm_usb_ocic_notify()
82 "over-current indicator changes\n", __func__); in da830_evm_usb_ocic_notify()
111 * Set up USB clock/mode in the CFGCHIP2 register. in da830_evm_usb_init()
116 /* USB2.0 PHY reference clock is 24 MHz */ in da830_evm_usb_init()
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| D | board-omapl138-hawk.c | 2 * Hawkboard.org based on TI's OMAP-L138 Platform
6 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
15 #include <linux/gpio.h>
17 #include <asm/mach-types.h>
22 #include <mach/mux.h>
24 #define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
37 -1
51 pr_warning("%s: cpgmac/mii mux setup failed: %d\n", in omapl138_hawk_config_emac()
60 soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; in omapl138_hawk_config_emac()
70 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
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| D | board-neuros-osd2.c | 4 * Modified from original 644X-EVM board support.
11 * DM644X-EVM board. It has:
14 * Additionally realtime clock, IR remote control receiver,
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds.
27 #include <linux/gpio.h>
30 #include <asm/mach-types.h>
37 #include <mach/mux.h>
42 #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
59 /* UBL (a few copies) plus U-Boot */
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| D | board-da850-evm.c | 2 * TI DA850/OMAP-L138 EVM board
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
22 #include <linux/gpio.h>
31 #include <linux/input/tps6507x-ts.h>
37 #include <asm/mach-types.h>
43 #include <mach/mux.h>
47 #define DA850_EVM_PHY_ID "davinci_mdio-0:00"
67 .name = "U-Boot",
73 .name = "U-Boot-Env",
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| D | dm355.c | 15 #include <linux/dma-mapping.h>
25 #include <mach/mux.h>
32 #include <mach/gpio-davinci.h>
34 #include "clock.h"
35 #include "mux.h"
58 /* FIXME -- crystal rate is board-specific */
132 /* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
164 /* NOTE: clkout3 can be externally gated by muxing GPIO-16 */
176 * - in SyncReset state by default
182 * - in Enabled state by default
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| D | dm644x.c | 23 #include <mach/mux.h>
28 #include <mach/gpio-davinci.h>
30 #include "clock.h"
31 #include "mux.h"
220 .name = "gpio",
305 CLK("davinci-mcbsp", NULL, &asp_clk),
308 CLK(NULL, "gpio", &gpio_clk),
332 .end = DM644X_EMAC_BASE + SZ_16K - 1,
355 .end = DM644X_EMAC_MDIO_BASE + SZ_4K - 1,
368 * Device specific mux setup
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| /linux-3.3/arch/arm/mach-at91/ |
| D | gpio.c | 2 * linux/arch/arm/mach-at91/gpio.c
14 #include <linux/gpio.h>
31 struct at91_gpio_chip *next; /* Bank sharing same clock */
34 struct clk *clock; /* associated clock */ member
86 /*--------------------------------------------------------------------------*/
103 * mux the pin to the "GPIO" peripheral role.
111 return -EINVAL; in at91_set_GPIO_periph()
121 * mux the pin to the "A" internal peripheral role.
129 return -EINVAL; in at91_set_A_periph()
141 * mux the pin to the "B" internal peripheral role.
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| /linux-3.3/arch/arm/plat-samsung/include/plat/ |
| D | audio.h | 1 /* arch/arm/plat-samsung/include/plat/audio.h
13 * of GPIO for AC97 pins
22 * of GPIO for S/PDIF pins
34 * If the I2S block has no internal prescalar or MUX (I2SMOD[10] bit)
35 * The Machine driver must provide suitably set clock to the I2S block.
43 * Array of clock names that can be used to generate I2S signals.
51 * struct s3c_audio_pdata - common platform data for audio device drivers
52 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
|
| /linux-3.3/sound/soc/codecs/ |
| D | alc5632.c | 2 * alc5632.c -- ALC5632 ALSA SoC Audio Codec
39 { 2, 0x8080 }, /* R2 - Speaker Output Volume */
40 { 4, 0x8080 }, /* R4 - Headphone Output Volume */
41 { 6, 0x8080 }, /* R6 - AUXOUT Volume */
42 { 8, 0xC800 }, /* R8 - Phone Input */
43 { 10, 0xE808 }, /* R10 - LINE_IN Volume */
44 { 12, 0x1010 }, /* R12 - STEREO DAC Input Volume */
45 { 14, 0x0808 }, /* R14 - MIC Input Volume */
46 { 16, 0xEE0F }, /* R16 - Stereo DAC and MIC Routing Control */
47 { 18, 0xCBCB }, /* R18 - ADC Record Gain */
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| D | wm8903.c | 2 * wm8903.c -- WM8903 ALSA SoC Audio driver
14 * - TDM mode configuration.
15 * - Digital microphone support.
23 #include <linux/gpio.h>
43 { 4, 0x0018 }, /* R4 - Bias Control 0 */
44 { 5, 0x0000 }, /* R5 - VMID Control 0 */
45 { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */
46 { 8, 0x0001 }, /* R8 - Analogue DAC 0 */
47 { 10, 0x0001 }, /* R10 - Analogue ADC 0 */
48 { 12, 0x0000 }, /* R12 - Power Management 0 */
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| D | wm9713.c | 2 * wm9713.c -- ALSA Soc WM9713 codec support
12 * Features:-
96 SOC_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux), /* record mux hp 1 */
97 SOC_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux), /* record mux mono 2 */
98 SOC_ENUM_SINGLE(AC97_VIDEO, 3, 8, wm9713_rec_src), /* record mux left 3 */
99 SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/
117 static const DECLARE_TLV_DB_SCALE(out_tlv, -4650, 150, 0);
118 static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
119 static const DECLARE_TLV_DB_SCALE(misc_tlv, -1500, 300, 0);
207 SOC_SINGLE("Bass Cut-off Switch", AC97_GENERAL_PURPOSE, 12, 1, 1),
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| D | wm8904.c | 2 * wm8904.c -- WM8904 ALSA SoC Audio driver
85 /* DC servo configuration - cached offset values */
90 0x8904, /* R0 - SW Reset and ID */
91 0x0000, /* R1 - Revision */
94 0x0018, /* R4 - Bias Control 0 */
95 0x0000, /* R5 - VMID Control 0 */
96 0x0000, /* R6 - Mic Bias Control 0 */
97 0x0000, /* R7 - Mic Bias Control 1 */
98 0x0001, /* R8 - Analogue DAC 0 */
99 0x9696, /* R9 - mic Filter Control */
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| D | tlv320aic3x.c | 20 * ---------------------------------------
21 * MONO_LOUT -> N/A | MONO_LOUT -> N/A
22 * | IN1L -> LINE1L
23 * | IN1R -> LINE1R
24 * | IN2L -> LINE2L
25 * | IN2R -> LINE2R
26 * | MIC3L/R -> N/A
29 * ---------------------------------------
41 #include <linux/gpio.h>
126 * wanting to read volatile bits from those registers that has both read-only
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| D | uda1380.c | 2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
8 * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
22 #include <linux/gpio.h>
66 u16 *cache = codec->reg_cache; in uda1380_read_reg_cache()
70 return -1; in uda1380_read_reg_cache()
80 u16 *cache = codec->reg_cache; in uda1380_write_reg_cache()
85 set_bit(reg - 0x10, &uda1380_cache_dirty); in uda1380_write_reg_cache()
111 if (!codec->active && (reg >= UDA1380_MVOL)) in uda1380_write()
114 if (codec->hw_write(codec->control_data, data, 3) == 3) { in uda1380_write()
116 i2c_master_send(codec->control_data, data, 1); in uda1380_write()
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| /linux-3.3/Documentation/ |
| D | pinctrl.txt | 6 - Enumerating and naming controllable pins
8 - Multiplexing of pins, pads, fingers (etc) see below for details
10 - Configuration of pins, pads, fingers (etc), such as software-controlled
11 biasing and driving mode specific pins, such as pull-up/down, open drain,
14 Top-level interface
19 - A pin controller is a piece of hardware, usually a set of registers, that
25 - PINS are equal to pads, fingers, balls or whatever packaging input or
29 be sparse - i.e. there may be gaps in the space with numbers where no
91 See for example arch/arm/mach-u300/Kconfig for an example.
100 also consider matching of offsets to the GPIO ranges that may be handled by
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| /linux-3.3/arch/arm/plat-omap/include/plat/ |
| D | mux.h | 2 * arch/arm/plat-omap/include/mach/mux.h
7 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
8 * Copyright (C) 2003 - 2008 Nokia Corporation
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * - W8 = ball
29 * - 1610 = 1510 or 1610, none if common for both 1510 and 1610
30 * - MMC2_DAT0 = function
37 #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */
101 * OMAP730/850 has a slightly different config for the pin mux.
102 * - config regs are the OMAP7XX_IO_CONF_x regs (see omap730.h) regs and
[all …]
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| /linux-3.3/arch/blackfin/mach-bf548/include/mach/ |
| D | defBF54x_base.h | 2 * Copyright 2007-2010 Analog Devices Inc.
4 * Licensed under the ADI BSD license or the GPL-2 (or later)
12 /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */
23 /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */
31 /* System Reset and Interrupt Controller (0xFFC00100 - 0xFFC00104) */
102 …rs are not defined in the shared file because they are not available on the ADSP-BF542 processor */
107 #define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */
124 /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-…
130 #define SPORT1_TCLKDIV 0xffc00908 /* SPORT1 Transmit Serial Clock Divider Regi…
136 #define SPORT1_RCLKDIV 0xffc00928 /* SPORT1 Receive Serial Clock Divider Regis…
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| /linux-3.3/arch/arm/mach-omap2/ |
| D | board-apollon.c | 2 * linux/arch/arm/mach-omap2/board-apollon.c
7 * Modified from mach-omap/omap2/board-h4.c
10 * the bootloader passes the board-specific data to the kernel.
12 * type if you need custom low-level initializations.
30 #include <linux/gpio.h>
33 #include <asm/mach-types.h>
44 #include <video/omap-panel-generic-dpi.h>
46 #include "mux.h"
63 .name = "X-Loader + U-Boot",
107 .name = "onenand-flash",
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| /linux-3.3/arch/powerpc/boot/dts/ |
| D | ep405.dts | 12 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <200000000>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
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| /linux-3.3/drivers/gpio/ |
| D | gpio-davinci.c | 2 * TI DaVinci GPIO Support
4 * Copyright (c) 2006-2007 David Brownell
12 #include <linux/gpio.h>
40 static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio) in gpio2regs() argument
44 if (gpio < 32 * 1) in gpio2regs()
46 else if (gpio < 32 * 2) in gpio2regs()
48 else if (gpio < 32 * 3) in gpio2regs()
50 else if (gpio < 32 * 4) in gpio2regs()
52 else if (gpio < 32 * 5) in gpio2regs()
70 /*--------------------------------------------------------------------------*/
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| /linux-3.3/sound/soc/omap/ |
| D | sdp3430.c | 2 * sdp3430.c -- SoC audio for TI OMAP3430 SDP
21 * 02110-1301 USA
33 #include <asm/mach-types.h>
35 #include <mach/gpio.h>
39 #include <linux/mfd/twl4030-audio.h>
42 #include "omap-mcbsp.h"
43 #include "omap-pcm.h"
47 /* TWL4030 PMBR1 Register GPIO6 mux bit */
55 struct snd_soc_pcm_runtime *rtd = substream->private_data; in sdp3430_hw_params()
56 struct snd_soc_dai *codec_dai = rtd->codec_dai; in sdp3430_hw_params()
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| /linux-3.3/drivers/media/video/cx18/ |
| D | cx18-gpio.c | 2 * cx18 gpio functions
4 * Derived from ivtv-gpio.c
22 * 02111-1307 USA
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-cards.h"
28 #include "cx18-gpio.h"
29 #include "tuner-xc2028.h"
31 /********************* GPIO stuffs *********************/
33 /* GPIO registers */
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| /linux-3.3/arch/arm/mach-omap1/ |
| D | Makefile | 6 obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
7 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
9 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
11 obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
14 obj-$(CONFIG_PM) += pm.o sleep.o
17 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
18 mailbox_mach-objs := mailbox.o
20 i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
21 obj-y += $(i2c-omap-m) $(i2c-omap-y)
23 led-y := leds.o
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