| /linux-6.8/Documentation/devicetree/bindings/media/ |
| D | mediatek,mdp3-rsz.yaml | 29 mediatek,gce-client-reg:
33 - description: phandle of GCE
34 - description: GCE subsys id
37 description: The register of client driver can be configured by gce with
38 4 arguments defined in this property. Each GCE subsys id is mapping to
39 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
41 mediatek,gce-events:
44 to gce. The event id is defined in the gce header
45 include/dt-bindings/gce/<chip>-gce.h of each chips.
54 - mediatek,gce-client-reg
[all …]
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| D | mediatek,mdp3-wrot.yaml | 29 mediatek,gce-client-reg:
33 - description: phandle of GCE
34 - description: GCE subsys id
37 description: The register of client driver can be configured by gce with
38 4 arguments defined in this property. Each GCE subsys id is mapping to
39 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
41 mediatek,gce-events:
44 to gce. The event id is defined in the gce header
45 include/dt-bindings/gce/<chip>-gce.h of each chips.
63 - mediatek,gce-client-reg
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| D | mediatek,mdp3-rdma.yaml | 35 mediatek,gce-client-reg:
39 - description: phandle of GCE
40 - description: GCE subsys id
43 description: The register of client driver can be configured by gce with
44 4 arguments defined in this property. Each GCE subsys id is mapping to
45 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
47 mediatek,gce-events:
50 to gce. The event id is defined in the gce header
51 include/dt-bindings/gce/<chip>-gce.h of each chips.
92 - mediatek,gce-client-reg
[all …]
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| D | mediatek,mdp3-fg.yaml | 25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
28 such as gce node, subsys id, offset and register size. The subsys id that is
29 mapping to the register of display function blocks is defined in the gce header
30 include/dt-bindings/gce/<chip>-gce.h of each chips.
34 - description: phandle of GCE
35 - description: GCE subsys id
46 - mediatek,gce-client-reg
54 #include <dt-bindings/gce/mt8195-gce.h>
59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
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| D | mediatek,mdp3-hdr.yaml | 25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
28 such as gce node, subsys id, offset and register size. The subsys id that is
29 mapping to the register of display function blocks is defined in the gce header
30 include/dt-bindings/gce/<chip>-gce.h of each chips.
34 - description: phandle of GCE
35 - description: GCE subsys id
46 - mediatek,gce-client-reg
54 #include <dt-bindings/gce/mt8195-gce.h>
59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
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| D | mediatek,mdp3-tcc.yaml | 26 mediatek,gce-client-reg:
28 The register of display function block to be set by gce. There are 4 arguments,
29 such as gce node, subsys id, offset and register size. The subsys id that is
30 mapping to the register of display function blocks is defined in the gce header
31 include/dt-bindings/gce/<chip>-gce.h of each chips.
35 - description: phandle of GCE
36 - description: GCE subsys id
47 - mediatek,gce-client-reg
55 #include <dt-bindings/gce/mt8195-gce.h>
60 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
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| D | mediatek,mdp3-stitch.yaml | 25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
28 such as gce node, subsys id, offset and register size. The subsys id that is
29 mapping to the register of display function blocks is defined in the gce header
30 include/dt-bindings/gce/<chip>-gce.h of each chips.
34 - description: phandle of GCE
35 - description: GCE subsys id
46 - mediatek,gce-client-reg
54 #include <dt-bindings/gce/mt8195-gce.h>
59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
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| D | mediatek,mdp3-tdshp.yaml | 25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
28 such as gce node, subsys id, offset and register size. The subsys id that is
29 mapping to the register of display function blocks is defined in the gce header
30 include/dt-bindings/gce/<chip>-gce.h of each chips.
34 - description: phandle of GCE
35 - description: GCE subsys id
46 - mediatek,gce-client-reg
54 #include <dt-bindings/gce/mt8195-gce.h>
59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
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| /linux-6.8/Documentation/devicetree/bindings/soc/mediatek/ |
| D | mediatek,ccorr.yaml | 25 mediatek,gce-client-reg:
29 - description: phandle of GCE
30 - description: GCE subsys id
33 description: The register of client driver can be configured by gce with
34 4 arguments defined in this property. Each GCE subsys id is mapping to
35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
37 mediatek,gce-events:
40 to gce. The event id is defined in the gce header
41 include/dt-bindings/gce/<chip>-gce.h of each chips.
50 - mediatek,gce-client-reg
[all …]
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| D | mediatek,wdma.yaml | 26 mediatek,gce-client-reg:
30 - description: phandle of GCE
31 - description: GCE subsys id
34 description: The register of client driver can be configured by gce with
35 4 arguments defined in this property. Each GCE subsys id is mapping to
36 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
38 mediatek,gce-events:
41 to gce. The event id is defined in the gce header
42 include/dt-bindings/gce/<chip>-gce.h of each chips.
57 - mediatek,gce-client-reg
[all …]
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| D | mediatek,mutex.yaml | 56 mediatek,gce-events:
59 to gce. The event id is defined in the gce header
60 include/dt-bindings/gce/<chip>-gce.h of each chips.
63 mediatek,gce-client-reg:
67 - description: phandle of GCE
68 - description: GCE subsys id
71 description: The register of client driver can be configured by gce with
72 4 arguments defined in this property. Each GCE subsys id is mapping to
73 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
107 #include <dt-bindings/gce/mt8173-gce.h>
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| /linux-6.8/Documentation/devicetree/bindings/mailbox/ |
| D | mediatek,gce-mailbox.yaml | 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
13 The Global Command Engine (GCE) is used to help read/write registers with
15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
21 - mediatek,mt6779-gce
22 - mediatek,mt8173-gce
23 - mediatek,mt8183-gce
24 - mediatek,mt8186-gce
25 - mediatek,mt8188-gce
26 - mediatek,mt8192-gce
27 - mediatek,mt8195-gce
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,mmsys.yaml | 73 Using mailbox to communicate with GCE, it should have this
75 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
79 mediatek,gce-client-reg:
81 The register of client driver can be configured by gce with 4 arguments
82 defined in this property, such as phandle of gce, subsys id,
85 register which is defined in the gce header
86 include/dt-bindings/gce/<chip>-gce.h.
106 #include <dt-bindings/gce/mt8173-gce.h>
114 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
115 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,padding.yaml | 37 mediatek,gce-client-reg:
39 GCE (Global Command Engine) is a multi-core micro processor that helps
41 describes GCE client's information that is composed by 4 fields.
42 1. Phandle of the GCE (there may be several GCE processors)
44 (Please refer to include/dt-bindings/gce/<chip>-gce.h)
50 - description: Phandle of the GCE
61 - mediatek,gce-client-reg
70 #include <dt-bindings/gce/mt8195-gce.h>
81 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
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| D | mediatek,postmask.yaml | 47 mediatek,gce-client-reg:
48 description: The register of client driver can be configured by gce with
49 4 arguments defined in this property, such as phandle of gce, subsys id,
50 register offset and size. Each GCE subsys id is mapping to a client
51 defined in the header include/dt-bindings/gce/<chip>-gce.h.
69 #include <dt-bindings/gce/mt8192-gce.h>
81 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
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| D | mediatek,dither.yaml | 50 mediatek,gce-client-reg:
51 description: The register of client driver can be configured by gce with
52 4 arguments defined in this property, such as phandle of gce, subsys id,
53 register offset and size. Each GCE subsys id is mapping to a client
54 defined in the header include/dt-bindings/gce/<chip>-gce.h.
72 #include <dt-bindings/gce/mt8183-gce.h>
84 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
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| D | mediatek,ccorr.yaml | 49 mediatek,gce-client-reg:
50 description: The register of client driver can be configured by gce with
51 4 arguments defined in this property, such as phandle of gce, subsys id,
52 register offset and size. Each GCE subsys id is mapping to a client
53 defined in the header include/dt-bindings/gce/<chip>-gce.h.
71 #include <dt-bindings/gce/mt8183-gce.h>
83 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
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| D | mediatek,gamma.yaml | 54 mediatek,gce-client-reg:
55 description: The register of client driver can be configured by gce with
56 4 arguments defined in this property, such as phandle of gce, subsys id,
57 register offset and size. Each GCE subsys id is mapping to a client
58 defined in the header include/dt-bindings/gce/<chip>-gce.h.
76 #include <dt-bindings/gce/mt8173-gce.h>
88 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
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| D | mediatek,wdma.yaml | 50 mediatek,gce-client-reg:
51 description: The register of client driver can be configured by gce with
52 4 arguments defined in this property, such as phandle of gce, subsys id,
53 register offset and size. Each GCE subsys id is mapping to a client
54 defined in the header include/dt-bindings/gce/<chip>-gce.h.
73 #include <dt-bindings/gce/mt8173-gce.h>
87 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
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| D | mediatek,ovl-2l.yaml | 52 mediatek,gce-client-reg:
53 description: The register of client driver can be configured by gce with
54 4 arguments defined in this property, such as phandle of gce, subsys id,
55 register offset and size. Each GCE subsys id is mapping to a client
56 defined in the header include/dt-bindings/gce/<chip>-gce.h.
75 #include <dt-bindings/gce/mt8183-gce.h>
89 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
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| D | mediatek,color.yaml | 59 mediatek,gce-client-reg:
60 description: The register of client driver can be configured by gce with
61 4 arguments defined in this property, such as phandle of gce, subsys id,
62 register offset and size. Each GCE subsys id is mapping to a client
63 defined in the header include/dt-bindings/gce/<chip>-gce.h.
81 #include <dt-bindings/gce/mt8173-gce.h>
93 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
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| D | mediatek,aal.yaml | 56 mediatek,gce-client-reg:
57 description: The register of client driver can be configured by gce with
58 4 arguments defined in this property, such as phandle of gce, subsys id,
59 register offset and size. Each GCE subsys id is mapping to a client
60 defined in the header include/dt-bindings/gce/<chip>-gce.h.
78 #include <dt-bindings/gce/mt8173-gce.h>
90 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
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| D | mediatek,ovl.yaml | 69 mediatek,gce-client-reg:
70 description: The register of client driver can be configured by gce with
71 4 arguments defined in this property, such as phandle of gce, subsys id,
72 register offset and size. Each GCE subsys id is mapping to a client
73 defined in the header include/dt-bindings/gce/<chip>-gce.h.
92 #include <dt-bindings/gce/mt8173-gce.h>
106 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
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| D | mediatek,dsc.yaml | 41 mediatek,gce-client-reg:
43 The register of client driver can be configured by gce with 4 arguments
44 defined in this property, such as phandle of gce, subsys id,
47 register which is defined in the gce header
48 include/dt-bindings/gce/<chip>-gce.h.
66 #include <dt-bindings/gce/mt8195-gce.h>
78 mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x9000 0x1000>;
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| D | mediatek,split.yaml | 42 mediatek,gce-client-reg:
44 The register of display function block to be set by gce. There are 4 arguments,
45 such as gce node, subsys id, offset and register size. The subsys id that is
46 mapping to the register of display function blocks is defined in the gce header
47 include/dt-bindings/gce/<chip>-gce.h of each chips.
51 - description: phandle of GCE
52 - description: GCE subsys id
76 - mediatek,gce-client-reg
|