Searched +full:gcc +full:- +full:msm8996 (Results 1 – 19 of 19) sorted by relevance
/linux-5.10/Documentation/devicetree/bindings/clock/ |
D | qcom,gcc-msm8996.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller Binding for MSM8996 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 15 power domains on MSM8996. 18 - dt-bindings/clock/qcom,gcc-msm8996.h 22 const: qcom,gcc-msm8996 [all …]
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/linux-5.10/arch/arm64/boot/dts/qcom/ |
D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,apr.h> 12 interrupt-parent = <&intc>; 14 #address-cells = <2>; 15 #size-cells = <2>; [all …]
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D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/power/qcom-rpmpd.h> 9 #include <dt-bindings/gpio/gpio.h> 12 interrupt-parent = <&intc>; 14 qcom,msm-id = <292 0x0>; 16 #address-cells = <2>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/phy/ |
D | qcom,qmp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Manu Gautam <mgautam@codeaurora.org> 20 - qcom,ipq8074-qmp-pcie-phy 21 - qcom,ipq8074-qmp-usb3-phy 22 - qcom,msm8996-qmp-pcie-phy 23 - qcom,msm8996-qmp-ufs-phy 24 - qcom,msm8996-qmp-usb3-phy [all …]
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D | qcom,qusb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Manu Gautam <mgautam@codeaurora.org> 19 - items: 20 - enum: 21 - qcom,ipq8074-qusb2-phy 22 - qcom,msm8996-qusb2-phy 23 - qcom,msm8998-qusb2-phy [all …]
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/linux-5.10/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie.txt | 3 - compatible: 7 - "qcom,pcie-ipq8064" for ipq8064 8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065 9 - "qcom,pcie-apq8064" for apq8064 10 - "qcom,pcie-apq8084" for apq8084 11 - "qcom,pcie-msm8996" for msm8996 or apq8096 12 - "qcom,pcie-ipq4019" for ipq4019 13 - "qcom,pcie-ipq8074" for ipq8074 14 - "qcom,pcie-qcs404" for qcs404 15 - "qcom,pcie-sdm845" for sdm845 [all …]
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/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,q6v5.txt | 6 - compatible: 10 "qcom,q6v5-pil", 11 "qcom,ipq8074-wcss-pil" 12 "qcom,msm8916-mss-pil", 13 "qcom,msm8974-mss-pil" 14 "qcom,msm8996-mss-pil" 15 "qcom,msm8998-mss-pil" 16 "qcom,sc7180-mss-pil" 17 "qcom,sdm845-mss-pil" 19 - reg: [all …]
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/linux-5.10/drivers/clk/qcom/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 41 tristate "MSM8996 CPU Clock Controller" 45 Support for the CPU clock controller on msm8996 devices. 244 tristate "MSM8996 Global Clock Controller" 247 Support for the global clock controller on msm8996 devices. 252 tristate "MSM8996 Multimedia Clock Controller" 256 Support for the multimedia clock controller on msm8996 devices. 484 tristate "High-Frequency PLL (HFPLL) Clock Controller" 486 Support for the high-frequency PLLs present on Qualcomm devices. 493 Support for the Krait ACC and GCC clock controllers. Say Y
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D | gcc-msm8996.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <linux/clk-provider.h> 15 #include <linux/reset-controller.h> 17 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 20 #include "clk-regmap.h" 21 #include "clk-alpha-pll.h" 22 #include "clk-rcg.h" 23 #include "clk-branch.h" 3641 { .compatible = "qcom,gcc-msm8996" }, 3666 .name = "gcc-msm8996", [all …]
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/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
D | mdp5.txt | 6 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display 7 controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996. 11 - compatible: 12 * "qcom,mdss" - MDSS 13 - reg: Physical base address and length of the controller's registers. 14 - reg-names: The names of register regions. The following regions are required: 17 - interrupts: The interrupt signal from MDSS. 18 - interrupt-controller: identifies the node as an interrupt controller. 19 - #interrupt-cells: specifies the number of cells needed to encode an interrupt 21 - power-domains: a power domain consumer specifier according to [all …]
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/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 14 - Sivaprakash Murugesan <sivaprak@codeaurora.org> 19 - qcom,ipq6018-apcs-apps-global 20 - qcom,ipq8074-apcs-apps-global 21 - qcom,msm8916-apcs-kpss-global 22 - qcom,msm8994-apcs-kpss-global 23 - qcom,msm8996-apcs-hmss-global [all …]
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/linux-5.10/Documentation/devicetree/bindings/firmware/ |
D | qcom,scm.txt | 9 - compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-msm8660" 16 * "qcom,scm-msm8916" 17 * "qcom,scm-msm8960" 18 * "qcom,scm-msm8974" [all …]
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/linux-5.10/Documentation/devicetree/bindings/bus/ |
D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple Power-Managed Bus 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real 19 on-SoC or externally) to function. 21 While "simple-pm-bus" follows the "simple-bus" set of properties, as 23 "simple-bus". [all …]
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/linux-5.10/Documentation/devicetree/bindings/usb/ |
D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manu Gautam <mgautam@codeaurora.org> 15 - enum: 16 - qcom,msm8996-dwc3 17 - qcom,msm8998-dwc3 18 - qcom,sc7180-dwc3 19 - qcom,sdm845-dwc3 20 - const: qcom,dwc3 [all …]
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/linux-5.10/Documentation/devicetree/bindings/media/ |
D | qcom,camss.txt | 5 - compatible: 9 - "qcom,msm8916-camss" 10 - "qcom,msm8996-camss" 11 - reg: 13 Value type: <prop-encoded-array> 14 Definition: Register ranges as listed in the reg-names property. 15 - reg-names: 19 - "csiphy0" 20 - "csiphy0_clk_mux" 21 - "csiphy1" [all …]
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/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.txt | 1 * Qualcomm SDHCI controller (sdhci-msm) 4 and the properties used by the sdhci-msm driver. 7 - compatible: Should contain a SoC-specific string and a IP version string: 9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0 10 "qcom,sdhci-msm-v5" for sdcc version 5.0 13 string is added to support this change - "qcom,sdhci-msm-v5". 15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4" 16 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4" 17 "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" 18 "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" [all …]
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/linux-5.10/drivers/phy/qualcomm/ |
D | phy-qcom-qmp.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 23 #include <dt-bindings/phy/phy.h> 25 #include "phy-qcom-qmp.h" 83 * if yes, then offset gives index in the reg-layout 115 /* set of registers with offsets different per-PHY */ 1827 /* struct qmp_phy_cfg - per-PHY initialization config */ 1829 /* phy-type - PCIE/UFS/USB */ 1834 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ 1898 * struct qmp_phy - per-lane phy descriptor [all …]
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/linux-5.10/ |
D | MAINTAINERS | 9 ------------------------- 30 ``diff -u`` to make the patch easy to merge. Be prepared to get your 40 See Documentation/process/coding-style.rst for guidance here. 46 See Documentation/process/submitting-patches.rst for details. 57 include a Signed-off-by: line. The current version of this 59 Documentation/process/submitting-patches.rst. 70 that the bug would present a short-term risk to other users if it 76 Documentation/admin-guide/security-bugs.rst for details. 81 --------------------------------------------------- 97 W: *Web-page* with status/info [all …]
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