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/linux-5.10/arch/arm/boot/dts/
Dbcm283x-rpi-usb-otg.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
8 * fifo sizes shouldn't exceed 3776 bytes.
10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Dbcm283x-rpi-usb-peripheral.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 g-rx-fifo-size = <256>;
5 g-np-tx-fifo-size = <32>;
6 g-tx-fifo-size = <256 256 512 512 512 768 768>;
Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
[all …]
Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "simple-bus";
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - const: brcm,bcm2835-usb
16 - const: hisilicon,hi6220-usb
17 - items:
18 - const: rockchip,rk3066-usb
19 - const: snps,dwc2
20 - items:
[all …]
Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
[all …]
/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
87 * stmmac_axi_setup - parse DT parameters for programming the AXI register
90 * if required, from device-tree the AXI internal register can be tuned
95 struct device_node *np; in stmmac_axi_setup() local
98 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
99 if (!np) in stmmac_axi_setup()
102 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
[all …]
/linux-5.10/drivers/tty/serial/
Darc_uart.c1 // SPDX-License-Identifier: GPL-2.0
3 * ARC On-Chip(fpga) UART Driver
5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
8 * -Decoupled the driver from arch/arc
10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
13 * -Is uart_tx_stopped() not done in tty write path as it has already been
17 * -New Serial Core based ARC UART driver
18 * -Derived largely from blackfin driver albiet with some major tweaks
21 * -check if sysreq works
58 #define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
[all …]
Damba-pl011.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2010 ST-Ericsson SA
11 * This is a generic driver for ARM AMBA-type serial ports. They
12 * have a lot of 16550-like features, but are not register compatible.
34 #include <linux/dma-mapping.h>
45 #include "amba-pl011.h"
264 unsigned int fifosize; /* vendor-specific */
266 unsigned int fixed_baud; /* vendor-set fixed baud rate */
281 return uap->reg_offset[reg]; in pl011_reg_to_offset()
287 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
[all …]
/linux-5.10/drivers/net/ethernet/packetengines/
Dyellowfin.c1 /* yellowfin.c: A Packet Engines G-NIC ethernet driver for linux. */
3 Written 1997-2001 by Donald Becker.
12 This driver is for the Packet Engines G-NIC PCI Gigabit Ethernet adapter.
22 [link no longer provides useful info -jgarzik]
32 /* The user-configurable values.
40 /* System-wide count of bogus-rx frames. */
43 static int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
44 #elif defined(YF_NEW) /* A future perfect board :->. */
49 static const int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
52 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
[all …]
Dhamachi.c1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
3 Written 1998-2000 by Donald Becker.
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
23 [link no longer provides useful info -jgarzik]
34 /* A few user-configurable values. */
42 /* Default values selected by testing on a dual processor PIII-450 */
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
69 - The lower 4 bits are reserved for the media type.
[all …]
/linux-5.10/drivers/net/ethernet/ibm/emac/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Driver for PowerPC 4xx on-chip ethernet controller.
48 #include <asm/dcr-regs.h>
55 * API-correct usage requires additional support state information to be
56 * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
57 * EMAC design (e.g. TX buffer passed from network stack can be split into
65 * controversial, but I really tried to make code API-correct and efficient
66 * at the same time and didn't come up with code I liked :(. --ebs
78 /* minimum number of free TX descriptors required to wake up TX process */
81 /* If packet size is less than this number, we allocate small skb and copy packet
[all …]
/linux-5.10/drivers/usb/dwc2/
Dparams.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2004-2016 Synopsys, Inc.
14 * 3. The names of the above-listed copyright holders may not be used
44 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_bcm_params()
46 p->host_rx_fifo_size = 774; in dwc2_set_bcm_params()
47 p->max_transfer_size = 65535; in dwc2_set_bcm_params()
48 p->max_packet_count = 511; in dwc2_set_bcm_params()
49 p->ahbcfg = 0x10; in dwc2_set_bcm_params()
54 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_his_params()
56 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; in dwc2_set_his_params()
[all …]
/linux-5.10/drivers/net/ethernet/adaptec/
Dstarfire.c3 Written 1998-2000 by Donald Becker.
25 [link no longer provides useful info -jgarzik]
56 * If using the broken firmware, data must be padded to the next 32-bit boundary.
63 * Define this if using the driver with the zero-copy patch
71 /* The user-configurable values.
81 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
87 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
89 * Set the copy breakpoint for the copy-only-tiny-frames scheme.
95 * packets as the starfire doesn't allow for misaligned DMAs ;-(
96 * 23/10/2000 - Jes
[all …]
/linux-5.10/drivers/net/ethernet/natsemi/
Dnatsemi.c3 Written/copyright 1999-2001 by Donald Becker.
23 [link no longer provides useful info -jgarzik]
62 /* Updated to recommendations in pci-skeleton v2.03. */
64 /* The user-configurable values.
72 static int debug = -1;
76 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
80 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
99 Making the Tx ring too large decreases the effectiveness of channel
101 There are no ill effects from too-large receive rings. */
121 * The nic writes 32-bit values, even if the upper bytes of
[all …]
/linux-5.10/drivers/dma/ppc4xx/
Dadma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2006-2009 DENX Software Engineering.
22 #include <linux/dma-mapping.h>
33 #include <asm/dcr-regs.h>
80 /* Pointer to DMA0, DMA1 CP/CS FIFO */
91 /* This array is used in data-check operations for storing a pattern */
98 /* Since RXOR operations use the common register (MQ0_CF2H) for setting-up
99 * the block size in transactions, then we do not allow to activate more than
135 switch (chan->device->id) { in print_cb()
145 cdb, chan->device->id, in print_cb()
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
/linux-5.10/drivers/media/platform/
Dpxa_camera.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/dma-mapping.h>
31 #include <linux/dma/pxa-dma.h>
33 #include <media/v4l2-async.h>
34 #include <media/v4l2-clk.h>
35 #include <media/v4l2-common.h>
36 #include <media/v4l2-ctrls.h>
37 #include <media/v4l2-device.h>
38 #include <media/v4l2-event.h>
39 #include <media/v4l2-ioctl.h>
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]
/linux-5.10/drivers/dma/
Damba-pl08x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2010 ST-Ericsson SA
10 * Documentation: ARM DDI 0196G == PL080
27 * - CH_CONFIG register at different offset,
28 * - separate CH_CONTROL2 register for transfer size,
29 * - bigger maximum transfer size,
30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
31 * - no support for peripheral flow control.
41 * For peripherals with a FIFO:
42 * Source burst size == half the depth of the peripheral FIFO
[all …]

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