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/qemu/tests/tcg/i386/
H A Dtest-i386-shift.h11 #define EXECSHIFT(size, rsize, res, s1, s2, flags) \ argument
17 : "=g" (res), "=g" (flags)\
18 : "r" (s1), "0" (res), "1" (flags));
20 #define EXECSHIFT(size, rsize, res, s1, s2, flags) \ argument
26 : "=q" (res), "=g" (flags)\
27 : "c" (s1), "0" (res), "1" (flags));
33 long res, flags; in exec_opq() local
35 flags = iflags; in exec_opq()
36 EXECSHIFT("q", "", res, s1, s2, flags); in exec_opq()
39 flags &= ~CC_O; in exec_opq()
[all …]
H A Dtest-i386.h8 #define EXECOP2(size, rsize, res, s1, flags) \ argument
14 : "=q" (res), "=g" (flags)\
15 : "q" (s1), "0" (res), "1" (flags)); \
17 stringify(OP) size, s0, s1, res, iflags, flags & CC_MASK);
19 #define EXECOP1(size, rsize, res, flags) \ argument
25 : "=q" (res), "=g" (flags)\
26 : "0" (res), "1" (flags)); \
28 stringify(OP) size, s0, res, iflags, flags & CC_MASK);
34 long res, flags; in exec_opq() local
36 flags = iflags; in exec_opq()
[all …]
H A Dtest-i386-muldiv.h4 long res, s1, s0, flags; in glue() local
8 flags = 0; in glue()
14 : "=a" (res), "=g" (flags) in glue()
15 : "q" (s1), "0" (res), "1" (flags)); in glue()
17 stringify(OP) "b", s0, s1, res, flags & CC_MASK); in glue()
22 long res, s1, flags, resh; in glue() local
26 flags = 0; in glue()
32 : "=a" (res), "=g" (flags), "=d" (resh) in glue()
33 : "q" (s1), "0" (res), "1" (flags), "2" (resh)); in glue()
35 stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK); in glue()
[all …]
H A Dtest-i386-adcox.c17 REG flags; in test_adox_adcx() local
20 asm("pushf; pop %0" : "=r"(flags)); in test_adox_adcx()
21 flags &= ~(CC_C | CC_O); in test_adox_adcx()
22 flags |= (in_c ? CC_C : 0); in test_adox_adcx()
23 flags |= (in_o ? CC_O : 0); in test_adox_adcx()
31 : "+r" (flags), "+r" (out_adcx), "+r" (out_adox) in test_adox_adcx()
32 : "r" ((REG) - 1), "0" (flags), "1" (out_adcx), "2" (out_adox)); in test_adox_adcx()
36 assert(!!(flags & CC_C) == (in_c || adcx_operand)); in test_adox_adcx()
37 assert(!!(flags & CC_O) == (in_o || adox_operand)); in test_adox_adcx()
42 REG flags; in test_adcx_adox() local
[all …]
H A Dtest-i386-fxam.c26 #define FLAGS (C0 | C1 | C2 | C3) macro
33 if ((sw & FLAGS) != C3) { in main()
38 if ((sw & FLAGS) != (C3 | C1)) { in main()
43 if ((sw & FLAGS) != C2) { in main()
48 if ((sw & FLAGS) != (C2 | C1)) { in main()
53 if ((sw & FLAGS) != (C2 | C0)) { in main()
58 if ((sw & FLAGS) != (C2 | C1 | C0)) { in main()
63 if ((sw & FLAGS) != C0) { in main()
68 if ((sw & FLAGS) != (C1 | C0)) { in main()
73 if ((sw & FLAGS) != C0) { in main()
[all …]
/qemu/target/arm/tcg/
H A Dhflags.c81 CPUARMTBFlags flags) in rebuild_hflags_common() argument
83 DP_TBFLAG_ANY(flags, FPEXC_EL, fp_el); in rebuild_hflags_common()
84 DP_TBFLAG_ANY(flags, MMUIDX, arm_to_core_mmu_idx(mmu_idx)); in rebuild_hflags_common()
87 DP_TBFLAG_ANY(flags, SS_ACTIVE, 1); in rebuild_hflags_common()
90 return flags; in rebuild_hflags_common()
95 CPUARMTBFlags flags) in rebuild_hflags_common_32() argument
100 DP_TBFLAG_A32(flags, SCTLR__B, 1); in rebuild_hflags_common_32()
103 DP_TBFLAG_ANY(flags, BE_DATA, 1); in rebuild_hflags_common_32()
105 DP_TBFLAG_A32(flags, NS, !access_secure_reg(env)); in rebuild_hflags_common_32()
107 return rebuild_hflags_common(env, fp_el, mmu_idx, flags); in rebuild_hflags_common_32()
[all …]
/qemu/hw/9pfs/
H A D9p-util-generic.c7 char *qemu_open_flags_tostr(int flags) in qemu_open_flags_tostr() argument
9 int acc = flags & O_ACCMODE; in qemu_open_flags_tostr()
12 (flags & O_CREAT) ? "|CREAT" : "", in qemu_open_flags_tostr()
13 (flags & O_EXCL) ? "|EXCL" : "", in qemu_open_flags_tostr()
14 (flags & O_NOCTTY) ? "|NOCTTY" : "", in qemu_open_flags_tostr()
15 (flags & O_TRUNC) ? "|TRUNC" : "", in qemu_open_flags_tostr()
16 (flags & O_APPEND) ? "|APPEND" : "", in qemu_open_flags_tostr()
17 (flags & O_NONBLOCK) ? "|NONBLOCK" : "", in qemu_open_flags_tostr()
18 (flags & O_DSYNC) ? "|DSYNC" : "", in qemu_open_flags_tostr()
20 (flags & O_DIRECT) ? "|DIRECT" : "", in qemu_open_flags_tostr()
[all …]
/qemu/target/tricore/
H A Dfpu_helper.c87 static void f_update_psw_flags(CPUTriCoreState *env, uint8_t flags) in f_update_psw_flags() argument
92 if (flags & float_flag_invalid) { in f_update_psw_flags()
97 if (flags & float_flag_overflow) { in f_update_psw_flags()
102 if (flags & float_flag_underflow || flags & float_flag_output_denormal_flushed) { in f_update_psw_flags()
107 if (flags & float_flag_divbyzero) { in f_update_psw_flags()
112 if (flags & float_flag_inexact || flags & float_flag_output_denormal_flushed) { in f_update_psw_flags()
125 uint32_t flags; \
129 flags = f_get_excp_flags(env); \
130 if (flags) { \
133 if ((flags & float_flag_invalid) \
[all …]
/qemu/tests/tcg/ppc64le/
H A Dfloat_madds.ref3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
5 res: f32(-nan:0xffc00000) flags=INVALID (0/1)
7 res: f32(-nan:0xffc00000) flags=INVALID (0/2)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
13 res: f32(-nan:0xffc00000) flags=OK (1/2)
15 res: f32(inf:0x7f800000) flags=OK (2/0)
17 res: f32(-inf:0xff800000) flags=OK (2/1)
19 res: f32(inf:0x7f800000) flags=OK (2/2)
21 res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
[all …]
/qemu/tests/tcg/aarch64/
H A Dfloat_madds.ref3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
13 res: f32(-nan:0xffc00000) flags=OK (1/2)
15 res: f32(inf:0x7f800000) flags=OK (2/0)
17 res: f32(-inf:0xff800000) flags=OK (2/1)
19 res: f32(inf:0x7f800000) flags=OK (2/2)
21 res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
[all …]
/qemu/tests/tcg/hexagon/
H A Dfloat_madds.ref3 res: f32(-nan:0xffffffff) flags=INVALID (0/0)
5 res: f32(-nan:0xffffffff) flags=INVALID (0/1)
7 res: f32(-nan:0xffffffff) flags=INVALID (0/2)
9 res: f32(-nan:0xffffffff) flags=OK (1/0)
11 res: f32(-nan:0xffffffff) flags=OK (1/1)
13 res: f32(-nan:0xffffffff) flags=OK (1/2)
15 res: f32(inf:0x7f800000) flags=OK (2/0)
17 res: f32(-inf:0xff800000) flags=OK (2/1)
19 res: f32(inf:0x7f800000) flags=OK (2/2)
21 res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
[all …]
/qemu/tests/tcg/loongarch64/
H A Dfloat_madds.ref3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
13 res: f32(-nan:0xffc00000) flags=OK (1/2)
15 res: f32(inf:0x7f800000) flags=OK (2/0)
17 res: f32(-inf:0xff800000) flags=OK (2/1)
19 res: f32(inf:0x7f800000) flags=OK (2/2)
21 res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
[all …]
/qemu/tests/tcg/arm/
H A Dfloat_madds.ref3 res: f32(-nan:0xffe00000) flags=INVALID (0/0)
5 res: f32(-nan:0xffe00000) flags=INVALID (0/1)
7 res: f32(-nan:0xffe00000) flags=INVALID (0/2)
9 res: f32(-nan:0xffc00000) flags=OK (1/0)
11 res: f32(-nan:0xffc00000) flags=OK (1/1)
13 res: f32(-nan:0xffc00000) flags=OK (1/2)
15 res: f32(inf:0x7f800000) flags=OK (2/0)
17 res: f32(-inf:0xff800000) flags=OK (2/1)
19 res: f32(inf:0x7f800000) flags=OK (2/2)
21 res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
[all …]
/qemu/hw/net/fsl_etsec/
H A Drings.c48 static void print_tx_bd_flags(uint16_t flags) in print_tx_bd_flags() argument
50 qemu_log(" Ready: %d\n", !!(flags & BD_TX_READY)); in print_tx_bd_flags()
51 qemu_log(" PAD/CRC: %d\n", !!(flags & BD_TX_PADCRC)); in print_tx_bd_flags()
52 qemu_log(" Wrap: %d\n", !!(flags & BD_WRAP)); in print_tx_bd_flags()
53 qemu_log(" Interrupt: %d\n", !!(flags & BD_INTERRUPT)); in print_tx_bd_flags()
54 qemu_log(" Last in frame: %d\n", !!(flags & BD_LAST)); in print_tx_bd_flags()
55 qemu_log(" Tx CRC: %d\n", !!(flags & BD_TX_TC)); in print_tx_bd_flags()
57 !!(flags & BD_TX_PREDEF)); in print_tx_bd_flags()
59 !!(flags & BD_TX_HFELC)); in print_tx_bd_flags()
61 !!(flags & BD_TX_CFRL)); in print_tx_bd_flags()
[all …]
/qemu/include/exec/
H A Dhelper-info.c.inc18 #define DEF_HELPER_FLAGS_0(NAME, FLAGS, RET) \
21 .flags = FLAGS | dh_callflag(RET), \
25 #define DEF_HELPER_FLAGS_1(NAME, FLAGS, RET, T1) \
28 .flags = FLAGS | dh_callflag(RET), \
32 #define DEF_HELPER_FLAGS_2(NAME, FLAGS, RET, T1, T2) \
35 .flags = FLAGS | dh_callflag(RET), \
40 #define DEF_HELPER_FLAGS_3(NAME, FLAGS, RET, T1, T2, T3) \
43 .flags = FLAGS | dh_callflag(RET), \
48 #define DEF_HELPER_FLAGS_4(NAME, FLAGS, RET, T1, T2, T3, T4) \
51 .flags = FLAGS | dh_callflag(RET), \
[all …]
H A Dlog.h12 * @flags: Flags what to log.
16 static inline void log_cpu_state(CPUState *cpu, int flags) in log_cpu_state() argument
20 cpu_dump_state(cpu, f, flags); in log_cpu_state()
29 * @flags: Flags what to log.
33 static inline void log_cpu_state_mask(int mask, CPUState *cpu, int flags) in log_cpu_state_mask() argument
36 log_cpu_state(cpu, flags); in log_cpu_state_mask()
/qemu/hw/misc/
H A Domap_clk.c38 uint32_t flags; member
53 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
59 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
66 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
74 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
81 .flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
87 .flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
94 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
102 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
108 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
[all …]
/qemu/hw/pci/
H A Dmsi.c58 static inline uint8_t msi_cap_sizeof(uint16_t flags) in msi_cap_sizeof() argument
60 switch (flags & (PCI_MSI_FLAGS_MASKBIT | PCI_MSI_FLAGS_64BIT)) { in msi_cap_sizeof()
87 static inline unsigned int msi_nr_vectors(uint16_t flags) in msi_nr_vectors() argument
90 ((flags & PCI_MSI_FLAGS_QSIZE) >> ctz32(PCI_MSI_FLAGS_QSIZE)); in msi_nr_vectors()
129 uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); in msi_set_message() local
130 bool msi64bit = flags & PCI_MSI_FLAGS_64BIT; in msi_set_message()
142 uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); in msi_prepare_message() local
143 bool msi64bit = flags & PCI_MSI_FLAGS_64BIT; in msi_prepare_message()
144 unsigned int nr_vectors = msi_nr_vectors(flags); in msi_prepare_message()
198 uint16_t flags; in msi_init() local
[all …]
/qemu/target/microblaze/
H A Dop_helper.c116 static void update_fpu_flags(CPUMBState *env, int flags, uintptr_t ra) in update_fpu_flags() argument
120 if (flags & float_flag_invalid) { in update_fpu_flags()
124 if (flags & float_flag_divbyzero) { in update_fpu_flags()
128 if (flags & float_flag_overflow) { in update_fpu_flags()
132 if (flags & float_flag_underflow) { in update_fpu_flags()
146 int flags; in helper_fadd() local
153 flags = get_float_exception_flags(&env->fp_status); in helper_fadd()
154 update_fpu_flags(env, flags, GETPC()); in helper_fadd()
161 int flags; in helper_frsub() local
167 flags = get_float_exception_flags(&env->fp_status); in helper_frsub()
[all …]
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_fcmp.c.inc9 uint32_t flags = 0;
12 flags |= FCMP_LT;
15 flags |= FCMP_EQ;
18 flags |= FCMP_UN;
21 flags |= FCMP_GT | FCMP_LT;
23 return flags;
29 uint32_t flags;
42 flags = get_fcmp_flags(a->fcond >> 1);
44 fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
53 uint32_t flags;
[all …]
/qemu/include/system/
H A Dblock-backend-io.h45 int64_t bytes, BdrvRequestFlags flags,
49 QEMUIOVector *qiov, BdrvRequestFlags flags,
52 QEMUIOVector *qiov, BdrvRequestFlags flags,
64 QEMUIOVector *qiov, BdrvRequestFlags flags,
147 BdrvRequestFlags flags);
149 void *buf, BdrvRequestFlags flags);
153 BdrvRequestFlags flags);
156 BdrvRequestFlags flags);
161 BdrvRequestFlags flags);
164 size_t qiov_offset, BdrvRequestFlags flags);
[all …]
/qemu/net/
H A Dqueue.c46 unsigned flags; member
95 unsigned flags, in qemu_net_queue_append() argument
107 packet->flags = flags; in qemu_net_queue_append()
118 unsigned flags, in qemu_net_queue_append_iov() argument
137 packet->flags = flags; in qemu_net_queue_append_iov()
153 unsigned flags, in qemu_net_queue_deliver() argument
164 ret = queue->deliver(sender, flags, &iov, 1, queue->opaque); in qemu_net_queue_deliver()
172 unsigned flags, in qemu_net_queue_deliver_iov() argument
179 ret = queue->deliver(sender, flags, iov, iovcnt, queue->opaque); in qemu_net_queue_deliver_iov()
198 unsigned flags, in qemu_net_queue_send() argument
[all …]
/qemu/bsd-user/
H A Dmmap.c170 * mmap_frag can be called with a valid fd, if flags doesn't contain one of
172 * pass fd == -1. However, if flags contains MAP_GUARD then MAP_ANON cannot be
176 * * If flags contains MAP_GUARD we don't want to add MAP_ANON because it
179 * * If flags contains MAP_ANON it doesn't matter if we add it or not.
180 * * If flags contains MAP_STACK, mmap adds MAP_ANON when called so doesn't
184 * Don't add MAP_ANON for the flags that use fd == -1 without specifying the
185 * flags directly, with the assumption that future flags that require fd == -1
190 int prot, int flags, int fd, abi_ulong offset) in mmap_frag() argument
209 flags | ((fd != -1) ? MAP_ANON : 0), -1, 0); in mmap_frag()
220 if ((flags & TARGET_BSD_MAP_FLAGMASK) == MAP_SHARED && in mmap_frag()
[all …]
/qemu/tests/qemu-iotests/tests/
H A Dqemu-img-bitmaps.out31 flags:
35 flags:
47 flags:
51 flags:
56 flags:
72 flags:
76 flags:
81 flags:
93 flags:
98 flags:
[all …]
/qemu/migration/
H A Dblock-dirty-bitmap.c31 * 1, 2 or 4 bytes: flags (see qemu_{put,put}_flags)
32 * [ 1 byte: node alias size ] \ flags & DEVICE_NAME
34 * [ 1 byte: bitmap alias size ] \ flags & BITMAP_NAME
37 * # Start of bitmap migration (flags & START)
40 * 1 byte: bitmap flags (corresponds to BdrvDirtyBitmap)
46 * # Complete of bitmap migration (flags & COMPLETE)
53 * [ be64: buffer size ] \ ! (flags & ZEROES)
56 * The last chunk in stream should contain flags & EOS. The chunk may skip
86 /* Flags occupy one, two or four bytes (Big Endian). The size is determined as
106 /* 0x04 was "AUTOLOAD" flags on older versions, now it is ignored */
[all …]

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