Searched +full:exynos4210 +full:- +full:sysram +full:- +full:ns (Results 1 – 8 of 8) sorted by relevance
/linux-5.10/Documentation/devicetree/bindings/sram/ |
D | sram.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic on-chip SRAM 10 - Rob Herring <robh@kernel.org> 19 Following the generic-names recommended practice, node names should 30 - mmio-sram 31 - atmel,sama5d2-securam 32 - rockchip,rk3288-pmu-sram 42 "#address-cells": [all …]
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/linux-5.10/arch/arm/mach-exynos/ |
D | exynos.c | 1 // SPDX-License-Identifier: GPL-2.0 5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. 15 #include <linux/soc/samsung/exynos-regs-pmu.h> 18 #include <asm/hardware/cache-l2x0.h> 33 .id = -1, 52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init() 61 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init() 76 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid() 84 iodesc.length = be32_to_cpu(reg[1]) - 1; in exynos_fdt_map_chipid() 133 * Apparently, these SoCs are not able to wake-up from suspend using [all …]
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D | mcpm-exynos.c | 1 // SPDX-License-Identifier: GPL-2.0 5 // Based on arch/arm/mach-vexpress/dcscb.c 7 #include <linux/arm-cci.h> 12 #include <linux/soc/samsung/exynos-regs-pmu.h> 67 return -EINVAL; in exynos_cpu_powerup() 89 timeout--; in exynos_cpu_powerup() 97 return -ETIMEDOUT; in exynos_cpu_powerup() 112 return -EINVAL; in exynos_cluster_powerup() 145 * On the Cortex-A15 we need to disable in exynos_cluster_cache_disable() 159 * Disable cluster-level coherency by masking in exynos_cluster_cache_disable() [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | exynos54xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 28 arm_a7_pmu: arm-a7-pmu { 29 compatible = "arm,cortex-a7-pmu"; 30 interrupt-parent = <&gic>; 38 arm_a15_pmu: arm-a15-pmu { 39 compatible = "arm,cortex-a15-pmu"; 40 interrupt-parent = <&combiner>; 49 compatible = "arm,armv7-timer"; 54 clock-frequency = <24000000>; [all …]
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D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4210 SoC device tree source 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional 20 #include "exynos4-cpu-thermal.dtsi" 23 compatible = "samsung,exynos4210", "samsung,exynos4"; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 29 fimc-lite0 = &fimc_lite_0; 30 fimc-lite1 = &fimc_lite_1; 35 #address-cells = <1>; 36 #size-cells = <0>; 40 compatible = "arm,cortex-a9"; 43 clock-names = "cpu"; 44 operating-points-v2 = <&cpu0_opp_table>; 45 #cooling-cells = <2>; /* min followed by max */ [all …]
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D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 50 #address-cells = <1>; 51 #size-cells = <0>; 55 compatible = "arm,cortex-a15"; 58 clock-names = "cpu"; 59 operating-points-v2 = <&cpu0_opp_table>; 60 #cooling-cells = <2>; /* min followed by max */ [all …]
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D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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