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/qemu/gdb-xml/
H A Dhexagon-core.xml19 …<reg name="r00" altname="r0" bitsize="32" offset="0" encoding="uint" format="hex" group="Thread …
20 …<reg name="r01" altname="r1" bitsize="32" offset="4" encoding="uint" format="hex" group="Thread …
21 …<reg name="r02" altname="r2" bitsize="32" offset="8" encoding="uint" format="hex" group="Thread …
22 …<reg name="r03" altname="r3" bitsize="32" offset="12" encoding="uint" format="hex" group="Thread …
23 …<reg name="r04" altname="r4" bitsize="32" offset="16" encoding="uint" format="hex" group="Thread …
24 …<reg name="r05" altname="r5" bitsize="32" offset="20" encoding="uint" format="hex" group="Thread …
25 …<reg name="r06" altname="r6" bitsize="32" offset="24" encoding="uint" format="hex" group="Thread …
26 …<reg name="r07" altname="r7" bitsize="32" offset="28" encoding="uint" format="hex" group="Thread …
27 …<reg name="r08" altname="r8" bitsize="32" offset="32" encoding="uint" format="hex" group="Thread …
28 …<reg name="r09" altname="r9" bitsize="32" offset="36" encoding="uint" format="hex" group="Thread …
[all …]
H A Dhexagon-hvx.xml59 …<reg name="v0" bitsize="1024" offset="256" encoding="vector" format="hex" group="HVX Vector Regi…
60 …<reg name="v1" bitsize="1024" offset="384" encoding="vector" format="hex" group="HVX Vector Regi…
61 …<reg name="v2" bitsize="1024" offset="512" encoding="vector" format="hex" group="HVX Vector Regi…
62 …<reg name="v3" bitsize="1024" offset="640" encoding="vector" format="hex" group="HVX Vector Regi…
63 …<reg name="v4" bitsize="1024" offset="768" encoding="vector" format="hex" group="HVX Vector Regi…
64 …<reg name="v5" bitsize="1024" offset="896" encoding="vector" format="hex" group="HVX Vector Regi…
65 …<reg name="v6" bitsize="1024" offset="1024" encoding="vector" format="hex" group="HVX Vector Regi…
66 …<reg name="v7" bitsize="1024" offset="1152" encoding="vector" format="hex" group="HVX Vector Regi…
67 …<reg name="v8" bitsize="1024" offset="1280" encoding="vector" format="hex" group="HVX Vector Regi…
68 …<reg name="v9" bitsize="1024" offset="1408" encoding="vector" format="hex" group="HVX Vector Regi…
[all …]
/qemu/docs/interop/
H A Dvnc-ledstate-pseudo-encoding.rst1 VNC LED state Pseudo-encoding
7 This document describes the Pseudo-encoding of LED state for RFB which
17 To solve this problem it attempts to add LED state Pseudo-encoding
20 Pseudo-encoding
23 This Pseudo-encoding requested by client declares to server that it supports
26 The Pseudo-encoding number for LED state defined as:
31 -261 'LED state Pseudo-encoding'
34 LED state Pseudo-encoding
37 The LED state Pseudo-encoding describes the encoding of LED state which
/qemu/target/hexagon/
H A Dcpu_bits.h44 static inline uint32_t parse_bits(uint32_t encoding) in parse_bits() argument
47 return extract32(encoding, 14, 2); in parse_bits()
50 static inline uint32_t iclass_bits(uint32_t encoding) in iclass_bits() argument
53 uint32_t iclass = extract32(encoding, 28, 4); in iclass_bits()
55 if (parse_bits(encoding) == 0) { in iclass_bits()
H A Ddecode.c41 * This table represents the mapping from the encoding to the actual values.
268 * Move stores to end (in same order as encoding)
434 static uint32_t get_duplex_iclass(uint32_t encoding) in get_duplex_iclass() argument
436 uint32_t iclass = extract32(encoding, 13, 1); in get_duplex_iclass()
437 iclass = deposit32(iclass, 1, 3, extract32(encoding, 29, 3)); in get_duplex_iclass()
472 static uint16_t get_slot0_subinsn(uint32_t encoding) in get_slot0_subinsn() argument
474 return extract32(encoding, 0, 13); in get_slot0_subinsn()
477 static uint16_t get_slot1_subinsn(uint32_t encoding) in get_slot1_subinsn() argument
479 return extract32(encoding, 16, 13); in get_slot1_subinsn()
483 decode_insns(DisasContext *ctx, Insn *insn, uint32_t encoding) in decode_insns() argument
[all …]
H A Dgen_dectree_import.c61 [TAG] = { .encoding = ENCSTR },
63 [TAG] = { .encoding = ENCSTR, .enc_class = CLASS },
65 [TAG] = { .encoding = ENCSTR, .enc_class = CLASS },
86 const char *tmp = opcode_encodings[opcode].encoding; in get_opcode_enc()
88 tmp = "MISSING ENCODING"; in get_opcode_enc()
95 const char *tmp = opcode_encodings[opcode].encoding; in get_opcode_enc_class()
H A Dopcodes.c55 [OPCODE] = { .encoding = ENCSTR },
58 [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
61 [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
H A Dgen_decodetree.py32 if iset.iset[tag]["enc"] != "MISSING ENCODING"
65 # These instructions have unused operand letters in their encoding
114 # The subinstructions come with a 13-bit encoding, but
162 ## Handle instructions with unused encoding letters
/qemu/target/arm/tcg/
H A Dneon-ls.decode22 # Encodings for Neon load/store instructions where the T32 encoding
23 # is a simple transformation of the A32 encoding.
24 # More specifically, this file covers instructions where the A32 encoding is
26 # and the T32 encoding is
28 # This file works on the A32 encoding only; calling code for T32 has to
/qemu/docs/
H A Dxbzrle.txt1 XBZRLE (Xor Based Zero Run Length Encoding)
4 Using XBZRLE (Xor Based Zero Run Length Encoding) allows for the reduction
32 There can be more than one valid encoding, the sender may send a longer encoding
44 On the sender side XBZRLE is used as a compact delta encoding of page updates,
56 ideal for in-line, real-time encoding such as is needed for live-migration.
112 xbzrle encoding rate: M
/qemu/hw/acpi/
H A Daml-build.c229 * ACPI 5.0 spec: 20.2.2 Name Objects Encoding: in build_append_namestringv()
283 /* 5.4 Definition Block Encoding */
308 * NamedField uses PkgLength encoding but it doesn't include length in build_prepend_package_length()
343 * are in PkgLength encoding. in build_prepend_package_length()
497 /* pack data with DefBuffer encoding */
543 /* ACPI 1.0b: 16.2.5.1 Namespace Modifier Objects Encoding: DefScope */
554 /* ACPI 1.0b: 16.2.5.3 Type 1 Opcodes Encoding: DefReturn */
562 /* ACPI 1.0b: 16.2.6.3 Debug Objects Encoding: DebugObj */
572 * ACPI 1.0b: 16.2.3 Data Objects Encoding:
596 /* ACPI 1.0b: 16.2.5.1 Namespace Modifier Objects Encoding: DefName */
[all …]
/qemu/scripts/
H A Du2f-setup-gen.py19 from cryptography.hazmat.primitives.serialization import Encoding, \
68 privkey_pem = privkey.private_bytes(encoding=Encoding.PEM,
71 pubkey_pem = pubkey.public_bytes(encoding=Encoding.PEM,
H A Dxml-preprocess.py90 with open(inc_file_path, "r", encoding="utf-8") as inc_file:
265 with open(path, "r", encoding="utf-8") as original_file:
274 with open(path, "w", encoding="utf-8") if path else sys.stdout as output_file:
/qemu/ui/
H A Dvnc-enc-zrle.h2 * QEMU VNC display driver: Zlib Run-length Encoding (ZRLE)
33 * ZRLE - encoding combining Zlib compression, tiling, palettisation and
34 * run-length encoding.
H A Dvnc-jobs.c52 * When the encoding job is done, the worker thread will hold the output lock
68 * already reentrant, so we can easily add more than one encoding thread
292 /* Copy persistent encoding data */ in vnc_worker_thread_loop()
317 /* Copy persistent encoding data */ in vnc_worker_thread_loop()
323 /* Copy persistent encoding data */ in vnc_worker_thread_loop()
H A Dvnc-enc-tight.h2 * QEMU VNC display driver: tight encoding
34 * Tight Encoding.
115 * encode one pixel. 1-bit encoding is performed such way that the most
140 * 8-bit wide, then one pixel in Tight encoding is always represented by
H A Dvnc-enc-zlib.c2 * QEMU VNC display driver: zlib encoding
111 // start encoding in vnc_zlib_stop()
/qemu/tests/tcg/hexagon/
H A Dreg_mut.c33 #define WRITE_REG_ENCODED(output, reg_name, input, encoding) \ argument
35 encoding "\n\t" \
41 #define WRITE_REG_PAIR_ENCODED(output, reg_name, input, encoding) \ argument
43 encoding "\n\t" \
/qemu/tests/qemu-iotests/
H A Dtestrunner.py47 with open(file1, encoding="utf-8") as f1, \
48 open(file2, encoding="utf-8") as f2:
72 with open(cache_file, encoding="utf-8") as f:
93 with open(self.cache_file, 'w', encoding="utf-8") as f:
279 with f_bad.open('w', encoding="utf-8") as f:
303 description=f_notrun.read_text(encoding='utf-8').strip())
307 casenotrun = f_casenotrun.read_text(encoding='utf-8')
/qemu/linux-headers/linux/
H A Dpsci.h74 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
84 /* PSCI extended power state encoding for CPU_SUSPEND function */
101 /* PSCI v1.1 reset type encoding for SYSTEM_RESET2 */
/qemu/linux-headers/asm-generic/
H A Dhugetlb_encode.h13 * encoding in flag arguments. System call specific header files
14 * that use this encoding should include this file. They can then
/qemu/docs/system/
H A Dsecrets.rst48 **Note: base64 encoding does not provide any security benefit.**
109 the secret with ``masterkey.data`` and then base64 encoding the ciphertext.
129 other features mentioned earlier such as base64 encoding:
/qemu/target/ppc/
H A Dmmu-hash64.h145 uint32_t pte_enc; /* Encoding in the HPTE (>>12) */
151 uint32_t slb_enc; /* SLB encoding for BookS */
/qemu/target/mips/tcg/
H A Dmicromips_translate.c.inc18 * Table 6.2 microMIPS32 Encoding of Major Opcode Field
148 /* POOL32A encoding of minor opcode field */
201 /* POOL32AXF encoding of minor opcode field extension */
207 * Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field
213 * Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field
321 /* POOL32B encoding of minor opcode field (bits 15..12) */
337 /* POOL32C encoding of minor opcode field (bits 15..12) */
358 /* POOL32C LD-EVA encoding of minor opcode field (bits 11..9) */
371 /* POOL32C ST-EVA encoding of minor opcode field (bits 11..9) */
384 /* POOL32F encoding of minor opcode field (bits 5..0) */
[all …]
/qemu/accel/hvf/
H A Dentitlements.plist1 <?xml version="1.0" encoding="UTF-8"?>

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