/qemu/docs/system/i386/ |
H A D | hyperv.rst | 51 Enables paravirtualized spinlocks. The parameter indicates how many times 78 Enables two Hyper-V-specific clocksources available to the guest: MSR-based 86 Enables Hyper-V Synthetic interrupt controller - an extension of a local APIC. 97 Enables Hyper-V synthetic timers. There are four synthetic timers per virtual 108 Enables paravirtualized TLB shoot-down mechanism. On x86 architecture, remote 118 Enables paravirtualized IPI send mechanism. HvCallSendSyntheticClusterIpi 216 Enables Hyper-V synthetic debugger interface, this is a special interface used 267 Note: ``hv-passthrough`` flag only enables enlightenments which are known to QEMU
|
H A D | xen.rst | 44 Setting this property enables the Xen guest support. If Xen version 4.5 or 46 4.6 enables the vCPU ID in CPUID, and version 4.17 advertises vCPU upcall
|
/qemu/include/exec/ |
H A D | replay-core.h | 20 /* Enables recording or saving event log with specified parameters */ 22 /* Initializes timers used for snapshotting and enables events recording */
|
/qemu/include/hw/misc/ |
H A D | xlnx-versal-pmc-iou-slcr.h | 44 * + Named GPIO output "sd-emmc-sel[0]": Enables 0: SD mode or 1: eMMC mode on 46 * + Named GPIO output "sd-emmc-sel[1]": Enables 0: SD mode or 1: eMMC mode on
|
/qemu/include/hw/ssi/ |
H A D | xlnx-versal-ospi.h | 45 * + Named GPIO input "ospi-mux-sel": 0: enables indirect access mode 46 * and 1: enables direct access mode.
|
/qemu/target/loongarch/ |
H A D | cpu.h | 45 #define FCSR0_M1 0x1f /* FCSR1 mask, Enables */ 50 FIELD(FCSR0, ENABLES, 0, 5) 65 #define GET_FP_ENABLES(REG) FIELD_EX32(REG, FCSR0, ENABLES) 68 (REG) = FIELD_DP32(REG, FCSR0, ENABLES, V); \
|
/qemu/qga/ |
H A D | service-win32.h | 21 #define QGA_SERVICE_DESCRIPTION "Enables integration with QEMU machine emulator and virtualizer."
|
/qemu/hw/vfio/ |
H A D | pci-quirks.h | 25 * passing through accesses. This enables devices where PCI config space
|
/qemu/docs/devel/migration/ |
H A D | mapped-ram.rst | 6 with ``multifd``. This enables parallel migration of a guest's RAM to 10 directly to offsets in the resulting migration file. This enables the
|
/qemu/docs/system/devices/ |
H A D | nvme.rst | 242 Enabling Flexible Data Placement on the subsyste enables the following 310 by the controller. Specifying a non-zero value enables reporting of both 334 The simplest possible invocation enables the capability to set up one VF
|
H A D | usb-u2f.rst | 4 U2F is an open authentication standard that enables relying parties
|
/qemu/docs/system/arm/ |
H A D | xenpvh.rst | 11 enables xenpvh to support TPM functionalities for a guest domain.
|
H A D | cpu-features.rst | 26 disabled, enables the optional AArch32 CPU feature, is only supported 76 (3) Let's try to disable ``aarch64``, which enables the AArch32 CPU feature:: 160 The example above disables the PMU and enables the first two SVE vector 236 CPU property completely enables or disables the PMU. The second type
|
/qemu/hw/char/ |
H A D | bcm2835_aux.c | 93 return 0xc0 | s->ier; /* FIFO enables always read 1 */ in bcm2835_aux_read() 96 res = 0xc0; /* FIFO enables */ in bcm2835_aux_read()
|
/qemu/target/microblaze/ |
H A D | cpu.c | 387 * use-non-secure enables/disables the use of the non_secure[3:0] signals. 399 /* Enables bus exceptions on failed data accesses (load/stores). */ 402 /* Enables bus exceptions on failed instruction fetches. */
|
/qemu/docs/tools/ |
H A D | qemu-vmsr-helper.rst | 15 Accessing the RAPL (Running Average Power Limit) MSR enables the RAPL powercap
|
/qemu/target/mips/ |
H A D | msa.c | 41 * - Cause, Enables, and Flags are all 0 in msa_reset()
|
/qemu/docs/system/s390x/ |
H A D | css.rst | 20 does not enable MSS (any Linux version that supports virtio also enables MSS).
|
/qemu/docs/interop/ |
H A D | virtio-balloon-stats.rst | 13 enables polling in the specified interval. If polling is already
|
/qemu/scripts/coverity-scan/ |
H A D | coverity-scan.docker | 7 # set of dependencies and a configure command that enables a specific
|
/qemu/hw/watchdog/ |
H A D | wdt_ib700.c | 57 /* A write to this register enables the timer. */
|
/qemu/target/hppa/ |
H A D | cpu.h | 165 FIELD(FPSR, ENABLES, 0, 5) 231 uint32_t fr0_shadow; /* flags, c, ca/cq, rm, d, enables */
|
/qemu/include/standard-headers/linux/ |
H A D | vhost_types.h | 35 /* Whether log address is valid. If set enables logging. */
|
/qemu/docs/devel/ |
H A D | secure-coding-practices.rst | 89 option enables these log messages.
|
/qemu/qapi/ |
H A D | control.json | 199 # @pretty: Enables pretty printing (QMP only)
|