Searched +full:dwmac +full:- +full:mdio (Results 1 – 25 of 66) sorted by relevance
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/linux-5.10/Documentation/devicetree/bindings/net/ |
D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-emac 19 - const: allwinner,sun8i-v3s-emac [all …]
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D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.50a 25 - snps,dwmac-3.610 [all …]
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D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel DWMAC glue layer Device Tree Bindings 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: "snps,dwmac.yaml#" 27 - items: [all …]
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D | qcom,ethqos.txt | 10 - compatible: Should be qcom,qcs404-ethqos" 12 - reg: Address and length of the register set for the device 14 - reg-names: Should contain register names "stmmaceth", "rgmii" 16 - clocks: Should contain phandle to clocks 18 - clock-names: Should contain clock names "stmmaceth", "pclk", 21 - interrupts: Should contain phandle to interrupts 23 - interrupt-names: Should contain interrupt names "macirq", "eth_lpi" 31 compatible = "qcom,qcs404-ethqos"; 34 reg-names = "stmmaceth", "rgmii"; 35 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; [all …]
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/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
D | stmmac_platform.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 Copyright (C) 2007-2011 STMicroelectronics Ltd 25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins 56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries 87 * stmmac_axi_setup - parse DT parameters for programming the AXI register 90 * if required, from device-tree the AXI internal register can be tuned 98 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup() 102 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup() 105 return ERR_PTR(-ENOMEM); in stmmac_axi_setup() 108 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); in stmmac_axi_setup() [all …]
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D | dwmac-sun8i.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer 11 #include <linux/mdio-mux.h> 26 /* General notes on dwmac-sun8i: 31 /* struct emac_variant - Describe dwmac-sun8i hardware variant 59 /* struct sunxi_priv_data - hold all sunxi private data 67 * @mux_handle: Internal pointer used by mdio-mux lib 145 * co-packaged AC200 chip instead. 265 /* sun8i_dwmac_dma_reset() - reset the EMAC 266 * Called from stmmac via stmmac_dma_ops->reset [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | artpec6-devboard.dts | 2 * Axis ARTPEC-6 development board. 9 /dts-v1/; 13 model = "ARTPEC-6 development board"; 14 compatible = "axis,artpec6-dev-board", "axis,artpec6"; 24 stdout-path = "serial3:115200n8"; 56 phy-handle = <&phy1>; 57 phy-mode = "gmii"; 59 mdio { 60 #address-cells = <0x1>; 61 #size-cells = <0x0>; [all …]
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D | rk3228-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 9 compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; 16 vcc_phy: vcc-phy-regulator { 17 compatible = "regulator-fixed"; 18 enable-active-high; 19 regulator-name = "vcc_phy"; 20 regulator-min-microvolt = <1800000>; 21 regulator-max-microvolt = <1800000>; 22 regulator-always-on; [all …]
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D | meson8b-mxq.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 22 stdout-path = "serial0:115200n8"; 30 iio-hwmon { 31 compatible = "iio-hwmon"; 32 io-channels = <&saradc 8>; 35 vcck: regulator-vcck { 36 compatible = "pwm-regulator"; 38 regulator-name = "VCCK"; [all …]
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D | stm32mp157c-odyssey.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 8 #include "stm32mp157c-odyssey-som.dtsi" 11 model = "Seeed Studio Odyssey-STM32MP157C Board"; 12 compatible = "seeed,stm32mp157c-odyssey", 13 "seeed,stm32mp157c-odyssey-som", "st,stm32mp157"; 21 stdout-path = "serial0:115200n8"; 27 pinctrl-0 = <ðernet0_rgmii_pins_a>; 28 pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>; 29 pinctrl-names = "default", "sleep"; [all …]
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D | stm32h743i-disco.dts | 2 * Copyright 2017 - Patrice Chotard <patrice.chotard@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32h743-pinctrl.dtsi" 48 model = "STMicroelectronics STM32H743i-Discovery board"; 49 compatible = "st,stm32h743i-disco", "st,stm32h743"; 53 stdout-path = "serial0:115200n8"; 65 v3v3: regulator-v3v3 { 66 compatible = "regulator-fixed"; 67 regulator-name = "v3v3"; [all …]
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D | meson8m2-mxiii-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2"; 27 stdout-path = "serial0:115200n8"; 35 adc-keys { 36 compatible = "adc-keys"; 37 io-channels = <&saradc 0>; [all …]
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D | rk3229-xms6.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/input/input.h> 17 dc_12v: dc-12v-regulator { 18 compatible = "regulator-fixed"; 19 regulator-name = "dc_12v"; 20 regulator-always-on; 21 regulator-boot-on; 22 regulator-min-microvolt = <12000000>; 23 regulator-max-microvolt = <12000000>; [all …]
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/linux-5.10/arch/arm64/boot/dts/qcom/ |
D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include "qcs404-evb.dtsi" 11 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", 18 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 19 snps,reset-active-low; 20 snps,reset-delays-us = <0 10000 10000>; 22 pinctrl-names = "default"; 23 pinctrl-0 = <ðernet_defaults>; [all …]
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/linux-5.10/arch/arm64/boot/dts/amlogic/ |
D | meson-gxbb-kii-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb-p20x.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 14 compatible = "videostrong,kii-pro", "amlogic,meson-gxbb"; 18 compatible = "gpio-leds"; 21 default-state = "off"; 27 gpio-keys-polled { [all …]
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D | meson-gxbb-p200.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb-p20x.dtsi" 11 #include <dt-bindings/input/input.h> 14 compatible = "amlogic,p200", "amlogic,meson-gxbb"; 17 avdd18_usb_adc: regulator-avdd18_usb_adc { 18 compatible = "regulator-fixed"; 19 regulator-name = "AVDD18_USB_ADC"; 20 regulator-min-microvolt = <1800000>; 21 regulator-max-microvolt = <1800000>; [all …]
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D | meson-gxbb-vega-s95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gxbb.dtsi" 9 compatible = "tronsmart,vega-s95", "amlogic,meson-gxbb"; 17 stdout-path = "serial0:115200n8"; 21 compatible = "gpio-leds"; 23 led-blue { 24 label = "vega-s95:blue:on"; 26 default-state = "on"; 27 panic-indicator; 31 usb_pwr: regulator-usb-pwrs { [all …]
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D | meson-gxbb-wetek.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include "meson-gxbb.dtsi" 17 stdout-path = "serial0:115200n8"; 26 compatible = "gpio-leds"; 28 led-system { 29 label = "wetek-play:system-status"; 31 default-state = "on"; 32 panic-indicator; 36 usb_pwr: regulator-usb-pwrs { 37 compatible = "regulator-fixed"; [all …]
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/linux-5.10/arch/mips/boot/dts/ingenic/ |
D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/x1830-cgu.h> 4 #include <dt-bindings/dma/x1830-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu2.0-mxu2.0"; 21 clock-names = "cpu"; [all …]
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D | x1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/x1000-cgu.h> 4 #include <dt-bindings/dma/x1000-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 21 clock-names = "cpu"; [all …]
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/linux-5.10/arch/mips/boot/dts/loongson/ |
D | ls7a-pch.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 compatible = "simple-bus"; 6 #address-cells = <2>; 7 #size-cells = <2>; 13 pic: interrupt-controller@10000000 { 14 compatible = "loongson,pch-pic-1.0"; 16 interrupt-controller; 17 interrupt-parent = <&htvec>; 18 loongson,pic-base-vec = <0>; 19 #interrupt-cells = <2>; [all …]
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/linux-5.10/arch/arc/boot/dts/ |
D | hsdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/reset/snps,hsdk-reset.h> 18 #address-cells = <2>; 19 #size-cells = <2>; 22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; 30 #address-cells = <1>; 31 #size-cells = <0>; 62 input_clk: input-clk { [all …]
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/linux-5.10/arch/arm64/boot/dts/mediatek/ |
D | mt2712-evb.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 14 compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 26 stdout-path = "serial0:921600n8"; 30 compatible = "regulator-fixed"; 31 regulator-name = "vproc_buck0"; 32 regulator-min-microvolt = <1000000>; 33 regulator-max-microvolt = <1000000>; 37 compatible = "regulator-fixed"; [all …]
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/linux-5.10/arch/arm64/boot/dts/intel/ |
D | socfpga_agilex_socdk_nand.dts | 1 // SPDX-License-Identifier: GPL-2.0 18 stdout-path = "serial0:115200n8"; 22 compatible = "gpio-leds"; 48 clock-frequency = <25000000>; 60 phy-mode = "rgmii"; 61 phy-handle = <&phy0>; 63 max-frame-size = <9000>; 66 #address-cells = <1>; 67 #size-cells = <0>; 68 compatible = "snps,dwmac-mdio"; [all …]
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D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 18 stdout-path = "serial0:115200n8"; 22 compatible = "gpio-leds"; 48 clock-frequency = <25000000>; 60 phy-mode = "rgmii"; 61 phy-handle = <&phy0>; 63 max-frame-size = <9000>; 66 #address-cells = <1>; 67 #size-cells = <0>; 68 compatible = "snps,dwmac-mdio"; [all …]
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