Searched full:design (Results 1 – 25 of 1257) sorted by relevance
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29 * - DiBcom NIM7090 reference design31 * - DiBcom NIM8096MD reference design33 * - DiBcom NIM9090MD reference design35 * - DiBcom STK7070P reference design37 * - DiBcom STK7070PD reference design39 * - DiBcom STK7700D reference design41 * - DiBcom STK7700P reference design43 * - DiBcom STK7770P reference design45 * - DiBcom STK807xP reference design47 * - DiBcom STK807xPVR reference design[all …]
64 - energy-full-design-microwatt-hours65 - charge-full-design-microamp-hours66 - voltage-min-design-microvolt67 Both or neither of the *-full-design-*-hours properties must be set.80 voltage-min-design-microvolt = <3200000>;81 energy-full-design-microwatt-hours = <5290000>;82 charge-full-design-microamp-hours = <1430000>;
54 voltage-min-design-microvolt:57 voltage-max-design-microvolt:60 energy-full-design-microwatt-hours:61 description: battery design energy63 charge-full-design-microamp-hours:64 description: battery design capacity152 voltage-min-design-microvolt = <3200000>;153 voltage-max-design-microvolt = <4200000>;154 energy-full-design-microwatt-hours = <5290000>;155 charge-full-design-microamp-hours = <1430000>;
35 - voltage-min-design-microvolt: drained battery voltage,36 - voltage-max-design-microvolt: fully charged battery voltage.52 voltage-min-design-microvolt = <3600000>;53 voltage-max-design-microvolt = <4200000>;
40 - charge-full-design-microamp-hours41 - voltage-min-design-microvolt42 - voltage-max-design-microvolt
11 lockdep-design14 mutex-design15 rt-mutex-design19 ww-mutex-design
27 Design/Memory-Ordering/Tree-RCU-Memory-Ordering28 Design/Expedited-Grace-Periods/Expedited-Grace-Periods29 Design/Requirements/Requirements30 Design/Data-Structures/Data-Structures
17 mutex-design23 * lockdep-design26 * rt-mutex-design29 * ww-mutex-design
35 - Identifier of the board design38 - Revision of the board design41 - Vendor of the board design44 - Model name of the board design
60 - Part number identifying the board design63 - ASIC design identifier66 - ASIC design revision
57 Versions in this section identify the device design. For example,127 Unique identifier of the board design.132 Board design revision.137 ASIC design identifier.142 ASIC design revision/stepping.
2 Device Driver Design Patterns5 This document describes a few common design patterns found in device drivers.7 conform to these design patterns.21 The most common way to achieve this is to use the state container design102 The design pattern is the same for an hrtimer or something similar that will
8 ftrace-design25 histogram-design32 ring-buffer-design
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH42 charge-full-design-microamp-hours = <3000000>;47 voltage-max-design-microvolt = <4100000>;48 voltage-min-design-microvolt = <3500000>;
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH46 charge-full-design-microamp-hours = <3000000>;51 voltage-max-design-microvolt = <4100000>;52 voltage-min-design-microvolt = <3500000>;
4 * design, codename "BMP".10 #include "intel-ixp4xx-reference-design.dtsi"14 model = "Intel IXDP465 BMP Reference Design";
4 * processor reference design.10 #include "intel-ixp4xx-reference-design.dtsi"14 model = "Intel KIXRP435 Reference Design";
4 * processor reference design.14 #include "intel-ixp4xx-reference-design.dtsi"18 model = "Intel IXDP425/IXCDP1100 Richfield Reference Design";
113 :ref:`design <damon_design_execution_model_and_data_structures>` for more173 :ref:`design <damon_design_execution_model_and_data_structures>` for more191 list different available operation sets. Please refer to the :ref:`design220 to the Design document (:doc:`/mm/damon/design`).231 Please refer to the :ref:`design document of the feature235 :ref:design doc <damon_design_monitoring_intervals_autotuning>` with the same270 monitoring region to specific address ranges. Please refer to the :ref:`design318 :ref:`design doc <damon_design_damos_action>`.395 parameters for the quota auto-tuning goals that specified on the :ref:`design449 Refer to :ref:`the design doc <damon_design_damos_filters>` for available type[all …]
2 Regulator API design notes6 of the design considerations which impact the regulator API design.
15 chip design is extremely large. Replacing fixed HW logic with a flexible and17 respin. Problems in the HW design can be counteracted in device FW. This is46 fwctl is aimed at the common device design pattern where the OS and FW64 correctly design the RPC interface. As a uAPI the subsystem provides a thin204 fwctl Driver design210 device design must already provide for isolation and cooperation between kernel248 FW to be a useful design.255 decades. With more devices wanting to follow this design pattern it is becoming
20 charge-full-design-microamp-hours = <3700000>;21 voltage-min-design-microvolt = <3400000>;22 voltage-max-design-microvolt = <4400000>;
20 charge-full-design-microamp-hours = <3300000>;21 voltage-min-design-microvolt = <3400000>;22 voltage-max-design-microvolt = <4400000>;
41 voltage-min-design-microvolt = <3400000>;42 voltage-max-design-microvolt = <4350000>;43 energy-full-design-microwatt-hours = <8740000>;44 charge-full-design-microamp-hours = <2300000>;
21 http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm48 http://developer.intel.com/design/network/products/npfamily/ixp425.htm106 The ADI Coyote platform is reference design for those building122 http://www.intel.com/design/network/products/npfamily/ixdpg425.htm129 http://www.intel.com/design/network/products/npfamily/ixdp465.htm