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188 * The following defines are for the flags in the host interrupt status223 * The following defines are for the flags in the host signal register 0.260 * The following defines are for the flags in the host interrupt control267 * The following defines are for the flags in the DMA status register.275 * The following defines are for the flags in the host DMA source address290 * The following defines are for the flags in the host DMA destination address305 * The following defines are for the flags in the host DMA control register.314 * The following defines are for the flags in the host DMA control register.344 * The following defines are for the flags in the performance monitor control371 * The following defines are for the flags in the performance counter value 1[all …]
52 * Added defines for MPI_DIAG_PREVENT_IOC_BOOT and54 * Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.64 * 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.79 * 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.121 * 01-09-01 01.01.03 Added event enabled and disabled defines.127 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.134 * related structure and defines.142 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.147 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.148 * 06-26-03 01.02.08 Added new values to the product family defines.[all …]
20 * 10-04-01 01.02.03 Added ActionData defines for33 * 01-15-05 01.05.02 Added defines for the two new RAID Actions for36 * associated defines.101 /* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */105 /* ActionDataWord defines for use with MPI_RAID_ACTION_DELETE_VOLUME action */112 /* ActionDataWord defines for use with MPI_RAID_ACTION_DISABLE_VOLUME action */115 /* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */118 /* ActionDataWord defines for use with MPI_RAID_ACTION_SET_RESYNC_RATE action */121 /* ActionDataWord defines for use with MPI_RAID_ACTION_SET_DATA_SCRUB_RATE action */124 /* ActionDataWord defines for use with MPI_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
45 * 01-09-01 01.01.05 Added defines for page address formats.56 * 01-29-01 01.01.07 Changed some defines to make them 32 character unique.57 * Added some LinkType defines for FcPortPage0.68 * defines to make them compatible to MPI version 1.0.70 * 04-09-01 01.01.11 Added some new defines for the PageAddress field and73 * Modified defines for Scsi Port Page 2.77 * Added defines for the SEP bits in RVP2 VolumeSettings.80 * Added defines for SES, SAF-TE, and cross channel for87 * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY93 * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED[all …]
27 * related structures and defines.46 /* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */50 /* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE …52 /* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */79 /* defines for the RAIDFunction field */84 /* defines for the Flags field */99 /* defines for the RAIDFunction field */104 /* defines for the Flags field */127 /* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */204 /* defines for the PhysDiskMap field */[all …]
17 * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags.66 * Added additional defines for RAID Volume Page 071 * added related defines.72 * Added PhysDiskAttributes field (and related defines) to84 * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3.88 * VolumeStatusFlags defines.93 * Removed SATA Init Failure defines for DiscoveryStatus98 * 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO108 * Added PhyInfo defines for power condition.111 * Added SAS PHY Page 4 structure and defines.[all …]
33 * Modified Reason Code defines for SAS Topology Change39 * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of66 * Added two new ReasonCode defines for SAS Device Status74 * Added defines for the indivdual signature bytes97 * Added defines for ProductID Product field101 * 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.103 * defines.115 * MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.300 /* defines for WhoInit field are after the IOCInit Request */791 /* defines for the Primitive field */[all …]
68 /* Control register defines */81 /* Clock Enable register defines */84 /* time-out register defines */89 /* card-type register defines */93 /* Interrupt status & mask register defines */112 /* Command register defines */128 /* Status register defines */130 /* Internal DMAC interrupt defines */
37 Defines the bandwidth which is propagated by this44 Defines the state of the gateway features. Can be51 Defines the selection criteria this node will use58 Defines the interval in milliseconds in which batman65 Defines the penalty which will be applied to an
29 * MAC BLOCK defines43 /* MAC CTRL defines */72 /* MAC FLOW CTRL defines */79 /* MII ADDR defines */84 * DMA BLOCK defines87 /* DMA Bus Mode register defines */98 /* DMA Control register defines */115 /* STMAC110 DMA Missed Frame Counter register defines */
76 /* GMAC Configuration defines */104 /* GMAC Frame Filter defines */115 /* GMII ADDR defines */118 /* GMAC FLOW CTRL defines */125 /*--- DMA BLOCK defines ---*/126 /* DMA Bus Mode register defines */151 /* DMA Bus Mode register defines */156 /* DMA operation mode defines (start/stop tx/rx are placed in common header)*/
7 * This file contains the board specific defines for various devices18 /* Hynix H7202 developer board specific device defines */29 /* Touch screen defines */41 /* Hynix H7201 developer board specific device defines */
15 * Do not add implementations specific defines here. This files contains16 * only defines of the onchip peripherals. Add those defines to boards.h,
221 /* FEF: defines for hostdata->dma_buffer_pool */276 /* defines for hostdata->chip */283 /* defines for hostdata->state */292 /* defines for hostdata->dma */297 /* defines for hostdata->level2 */308 /* defines for hostdata->disconnect */314 /* defines for hostdata->args */324 /* defines for hostdata->sync_stat[] */331 /* defines for hostdata->proc */
58 /* These inline assembly defines are derived from a patch315 /* defines for hostdata->chip */322 /* defines for hostdata->state */331 /* defines for hostdata->fifo */337 /* defines for hostdata->level2 */351 /* defines for hostdata->disconnect */357 /* defines for hostdata->args */370 /* defines for hostdata->sync_xfer[] */377 /* defines for hostdata->proc */
15 /* Broadsheet command defines */32 /* Broadsheet register interface defines */36 /* Broadsheet pin interface specific defines */41 /* Broadsheet IO interface specific defines */
69 * Useful defines for managing the registers110 * Useful defines for managing the ICS1562 PLL clock118 * Useful defines for managing the BT485 on the 8-plane TGA144 * Useful defines for managing the BT463 on the 24-plane TGAs/SFB+s172 * Useful defines for managing the BT459 on the 8-plane SFB+s
66 /* volume control bit defines */72 /* record mux defines */82 /* general purpose register bit defines */93 /* extended audio status and control bit defines */113 /* S/PDIF control bit defines */127 /* powerdown control and status bit defines */146 /* extended audio ID register bit defines */162 /* extended status register bit defines */179 /* extended audio ID register bit defines */195 /* extended status register bit defines */
45 Node defines the base address of the SEC 4 block.61 Definition: A standard property. Defines the number of cells67 Definition: A standard property. Defines the number of cells120 Child of the crypto node defines data processing interface to SEC 4177 Child node of the crypto node. Defines a register space that193 Definition: A standard property. Defines the number of cells200 Definition: A standard property. Defines the number of cells230 A child node that defines individual RTIC memory regions that are used to232 The node defines a register that contains the memory address &280 Node defines address range and the associated
44 /* flag which defines if the shared area address should be199 /* the token that defines the start of time address */218 /* the token that defines the start of time address */231 /* the token that defines the static pool address address */234 /* the token that defines the data pool pointers address */237 /* the token that defines the data pool pointers address */
2 * eexpress.h: Intel EtherExpress16 defines25 * card register defines67 * SCB defines98 * Command block defines136 * Frame Descriptor (Receive block) defines
21 * The following defines features that may or may not be supported by the39 * The following defines OS features that are optionally present in49 * These defines must be kept in sync with the corresponding
5 * GCC defines register number like this:41 * This struct defines the way the registers are stored on the56 * This struct defines the way the DSP registers are stored on the
59 * the following #defines will be used by the logging entities to indicate62 * process to be used while changing the following #defines:85 * the following #defines will be used by the logging entities to indicate88 * process to be used while changing the following #defines:
2 * AUTCPU12 specific defines63 * defines for smartmedia card access 71 * defines for lcd contrast