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/qemu/linux-headers/asm-powerpc/
H A Dunistd_32.h2 #define _ASM_UNISTD_32_H
4 #define __NR_restart_syscall 0
5 #define __NR_exit 1
6 #define __NR_fork 2
7 #define __NR_read 3
8 #define __NR_write 4
9 #define __NR_open 5
10 #define __NR_close 6
11 #define __NR_waitpid 7
12 #define __NR_creat 8
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H A Dunistd_64.h2 #define _ASM_UNISTD_64_H
4 #define __NR_restart_syscall 0
5 #define __NR_exit 1
6 #define __NR_fork 2
7 #define __NR_read 3
8 #define __NR_write 4
9 #define __NR_open 5
10 #define __NR_close 6
11 #define __NR_waitpid 7
12 #define __NR_creat 8
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/qemu/linux-headers/asm-s390/
H A Dunistd_32.h3 #define _ASM_S390_UNISTD_32_H
5 #define __NR_exit 1
6 #define __NR_fork 2
7 #define __NR_read 3
8 #define __NR_write 4
9 #define __NR_open 5
10 #define __NR_close 6
11 #define __NR_restart_syscall 7
12 #define __NR_creat 8
13 #define __NR_link 9
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H A Dunistd_64.h3 #define _ASM_S390_UNISTD_64_H
5 #define __NR_exit 1
6 #define __NR_fork 2
7 #define __NR_read 3
8 #define __NR_write 4
9 #define __NR_open 5
10 #define __NR_close 6
11 #define __NR_restart_syscall 7
12 #define __NR_creat 8
13 #define __NR_link 9
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/qemu/linux-headers/asm-x86/
H A Dunistd_32.h2 #define _ASM_UNISTD_32_H
4 #define __NR_restart_syscall 0
5 #define __NR_exit 1
6 #define __NR_fork 2
7 #define __NR_read 3
8 #define __NR_write 4
9 #define __NR_open 5
10 #define __NR_close 6
11 #define __NR_waitpid 7
12 #define __NR_creat 8
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H A Dunistd_64.h2 #define _ASM_UNISTD_64_H
4 #define __NR_read 0
5 #define __NR_write 1
6 #define __NR_open 2
7 #define __NR_close 3
8 #define __NR_stat 4
9 #define __NR_fstat 5
10 #define __NR_lstat 6
11 #define __NR_poll 7
12 #define __NR_lseek 8
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/qemu/bsd-user/netbsd/
H A Dsyscall_nr.h9 #define TARGET_NETBSD_NR_syscall 0
10 #define TARGET_NETBSD_NR_exit 1
11 #define TARGET_NETBSD_NR_fork 2
12 #define TARGET_NETBSD_NR_read 3
13 #define TARGET_NETBSD_NR_write 4
14 #define TARGET_NETBSD_NR_open 5
15 #define TARGET_NETBSD_NR_close 6
16 #define TARGET_NETBSD_NR_wait4 7
17 #define TARGET_NETBSD_NR_compat_43_ocreat 8
18 #define TARGET_NETBSD_NR_link 9
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/qemu/linux-headers/asm-loongarch/
H A Dunistd_64.h2 #define _ASM_UNISTD_64_H
4 #define __NR_io_setup 0
5 #define __NR_io_destroy 1
6 #define __NR_io_submit 2
7 #define __NR_io_cancel 3
8 #define __NR_io_getevents 4
9 #define __NR_setxattr 5
10 #define __NR_lsetxattr 6
11 #define __NR_fsetxattr 7
12 #define __NR_getxattr 8
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/qemu/linux-headers/asm-riscv/
H A Dunistd_32.h2 #define _ASM_UNISTD_32_H
4 #define __NR_io_setup 0
5 #define __NR_io_destroy 1
6 #define __NR_io_submit 2
7 #define __NR_io_cancel 3
8 #define __NR_setxattr 5
9 #define __NR_lsetxattr 6
10 #define __NR_fsetxattr 7
11 #define __NR_getxattr 8
12 #define __NR_lgetxattr 9
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H A Dunistd_64.h2 #define _ASM_UNISTD_64_H
4 #define __NR_io_setup 0
5 #define __NR_io_destroy 1
6 #define __NR_io_submit 2
7 #define __NR_io_cancel 3
8 #define __NR_io_getevents 4
9 #define __NR_setxattr 5
10 #define __NR_lsetxattr 6
11 #define __NR_fsetxattr 7
12 #define __NR_getxattr 8
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/qemu/linux-headers/asm-arm64/
H A Dunistd_64.h2 #define _ASM_UNISTD_64_H
4 #define __NR_io_setup 0
5 #define __NR_io_destroy 1
6 #define __NR_io_submit 2
7 #define __NR_io_cancel 3
8 #define __NR_io_getevents 4
9 #define __NR_setxattr 5
10 #define __NR_lsetxattr 6
11 #define __NR_fsetxattr 7
12 #define __NR_getxattr 8
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/qemu/hw/display/
H A Dati_regs.h25 #define ATI_REGS_H
29 #define MM_INDEX 0x0000
30 #define MM_DATA 0x0004
31 #define CLOCK_CNTL_INDEX 0x0008
32 #define CLOCK_CNTL_DATA 0x000c
33 #define BIOS_0_SCRATCH 0x0010
34 #define BUS_CNTL 0x0030
35 #define BUS_CNTL1 0x0034
36 #define GEN_INT_CNTL 0x0040
37 #define GEN_INT_STATUS 0x0044
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/qemu/include/hw/arm/
H A Dfsl-imx6.h18 #define FSL_IMX6_H
41 #define TYPE_FSL_IMX6 "fsl-imx6"
44 #define FSL_IMX6_NUM_CPUS 4
45 #define FSL_IMX6_NUM_UARTS 5
46 #define FSL_IMX6_NUM_EPITS 2
47 #define FSL_IMX6_NUM_I2CS 3
48 #define FSL_IMX6_NUM_GPIOS 7
49 #define FSL_IMX6_NUM_ESDHCS 4
50 #define FSL_IMX6_NUM_ECSPIS 5
51 #define FSL_IMX6_NUM_WDTS 2
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/qemu/bsd-user/freebsd/
H A Dsyscall_nr.h8 #define TARGET_FREEBSD_NR_syscall 0
9 #define TARGET_FREEBSD_NR_exit 1
10 #define TARGET_FREEBSD_NR_fork 2
11 #define TARGET_FREEBSD_NR_read 3
12 #define TARGET_FREEBSD_NR_write 4
13 #define TARGET_FREEBSD_NR_open 5
14 #define TARGET_FREEBSD_NR_close 6
15 #define TARGET_FREEBSD_NR_wait4 7
17 #define TARGET_FREEBSD_NR_link 9
18 #define TARGET_FREEBSD_NR_unlink 10
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/qemu/include/standard-headers/linux/
H A Dinput-event-codes.h17 #define _INPUT_EVENT_CODES_H
23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
31 #define INPUT_PROP_MAX 0x1f
32 #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1)
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/qemu/target/riscv/
H A Dcpu_bits.h4 #define TARGET_RISCV_CPU_BITS_H
6 #define get_field(reg, mask) (((reg) & \
8 #define set_field(reg, mask, val) (((reg) & ~(uint64_t)(mask)) | \
13 #define EXT_STATUS_MASK 0x3ULL
16 #define FSR_RD_SHIFT 5
17 #define FSR_RD (0x7 << FSR_RD_SHIFT)
20 #define FPEXC_NX 0x01
21 #define FPEXC_UF 0x02
22 #define FPEXC_OF 0x04
23 #define FPEXC_DZ 0x08
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/qemu/include/hw/usb/
H A Ddwc2-regs.h43 #define DWC2_REGS_H
45 #define HSOTG_REG(x) (x)
47 #define GOTGCTL HSOTG_REG(0x000)
48 #define GOTGCTL_CHIRPEN BIT(27)
49 #define GOTGCTL_MULT_VALID_BC_MASK (0x1f << 22)
50 #define GOTGCTL_MULT_VALID_BC_SHIFT 22
51 #define GOTGCTL_OTGVER BIT(20)
52 #define GOTGCTL_BSESVLD BIT(19)
53 #define GOTGCTL_ASESVLD BIT(18)
54 #define GOTGCTL_DBNC_SHORT BIT(17)
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/qemu/include/hw/pci-host/
H A Dpnv_phb3_regs.h11 #define PCI_HOST_PNV_PHB3_REGS_H
19 #define PBCQ_NEST_IRSN_COMPARE 0x1a
20 #define PBCQ_NEST_IRSN_COMP PPC_BITMASK(0, 18)
21 #define PBCQ_NEST_IRSN_MASK 0x1b
22 #define PBCQ_NEST_LSI_SRC_ID 0x1f
23 #define PBCQ_NEST_LSI_SRC PPC_BITMASK(0, 7)
24 #define PBCQ_NEST_REGS_COUNT 0x46
25 #define PBCQ_NEST_MMIO_BAR0 0x40
26 #define PBCQ_NEST_MMIO_BAR1 0x41
27 #define PBCQ_NEST_PHB_BAR 0x42
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H A Dpnv_phb4_regs.h11 #define PCI_HOST_PNV_PHB4_REGS_H
38 #define PEC_STACK_OFFSET 0x40
41 #define PEC_NEST_PBCQ_HW_CONFIG 0x00
42 #define PEC_NEST_DROP_PRIO_CTRL 0x01
43 #define PEC_NEST_PBCQ_ERR_INJECT 0x02
44 #define PEC_NEST_PCI_NEST_CLK_TRACE_CTL 0x03
45 #define PEC_NEST_PBCQ_PMON_CTRL 0x04
46 #define PEC_NEST_PBCQ_PBUS_ADDR_EXT 0x05
47 #define PEC_NEST_PBCQ_PRED_VEC_TIMEOUT 0x06
48 #define PEC_NEST_CAPP_CTRL 0x07
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/qemu/include/hw/pci/
H A Dpci_ids.h12 #define HW_PCI_IDS_H
16 #define PCI_CLASS_NOT_DEFINED 0x0000
17 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
19 #define PCI_BASE_CLASS_STORAGE 0x01
20 #define PCI_CLASS_STORAGE_SCSI 0x0100
21 #define PCI_CLASS_STORAGE_IDE 0x0101
22 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
23 #define PCI_CLASS_STORAGE_IPI 0x0103
24 #define PCI_CLASS_STORAGE_RAID 0x0104
25 #define PCI_CLASS_STORAGE_ATA 0x0105
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/qemu/linux-headers/asm-mips/
H A Dunistd_o32.h2 #define _ASM_UNISTD_O32_H
4 #define __NR_syscall (__NR_Linux + 0)
5 #define __NR_exit (__NR_Linux + 1)
6 #define __NR_fork (__NR_Linux + 2)
7 #define __NR_read (__NR_Linux + 3)
8 #define __NR_write (__NR_Linux + 4)
9 #define __NR_open (__NR_Linux + 5)
10 #define __NR_close (__NR_Linux + 6)
11 #define __NR_waitpid (__NR_Linux + 7)
12 #define __NR_creat (__NR_Linux + 8)
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H A Dunistd_n64.h2 #define _ASM_UNISTD_N64_H
4 #define __NR_read (__NR_Linux + 0)
5 #define __NR_write (__NR_Linux + 1)
6 #define __NR_open (__NR_Linux + 2)
7 #define __NR_close (__NR_Linux + 3)
8 #define __NR_stat (__NR_Linux + 4)
9 #define __NR_fstat (__NR_Linux + 5)
10 #define __NR_lstat (__NR_Linux + 6)
11 #define __NR_poll (__NR_Linux + 7)
12 #define __NR_lseek (__NR_Linux + 8)
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H A Dunistd_n32.h2 #define _ASM_UNISTD_N32_H
4 #define __NR_read (__NR_Linux + 0)
5 #define __NR_write (__NR_Linux + 1)
6 #define __NR_open (__NR_Linux + 2)
7 #define __NR_close (__NR_Linux + 3)
8 #define __NR_stat (__NR_Linux + 4)
9 #define __NR_fstat (__NR_Linux + 5)
10 #define __NR_lstat (__NR_Linux + 6)
11 #define __NR_poll (__NR_Linux + 7)
12 #define __NR_lseek (__NR_Linux + 8)
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/qemu/hw/net/
H A Dtulip.h2 #define HW_TULIP_H
8 #define TYPE_TULIP "tulip"
11 #define CSR(_x) ((_x) << 3)
13 #define CSR0_SWR BIT(0)
14 #define CSR0_BAR BIT(1)
15 #define CSR0_DSL_SHIFT 2
16 #define CSR0_DSL_MASK 0x1f
17 #define CSR0_BLE BIT(7)
18 #define CSR0_PBL_SHIFT 8
19 #define CSR0_PBL_MASK 0x3f
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/qemu/include/hw/misc/
H A Dimx6ul_ccm.h11 #define IMX6UL_CCM_H
17 #define CCM_CCR 0
18 #define CCM_CCDR 1
19 #define CCM_CSR 2
20 #define CCM_CCSR 3
21 #define CCM_CACRR 4
22 #define CCM_CBCDR 5
23 #define CCM_CBCMR 6
24 #define CCM_CSCMR1 7
25 #define CCM_CSCMR2 8
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