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/linux-6.15/Documentation/devicetree/bindings/media/
Dqcom,sm8550-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8550-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Depeng Shao <quic_depengs@quicinc.com>
17 const: qcom,sm8550-camss
22 reg-names:
24 - const: csid0
25 - const: csid1
26 - const: csid2
[all …]
Dqcom,sm8250-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
17 const: qcom,sm8250-camss
23 clock-names:
25 - const: cam_ahb_clk
26 - const: cam_hf_axi
27 - const: cam_sf_axi
[all …]
Dqcom,sdm670-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Acayan <mailingradian@gmail.com>
17 const: qcom,sdm670-camss
22 reg-names:
24 - const: csid0
25 - const: csid1
26 - const: csid2
[all …]
Dbrcm,bcm2835-unicam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
12 description: |-
14 CSI-2 or CCP2 data from image sensors or similar devices.
26 const: brcm,bcm2835-unicam
30 - description: Unicam block.
31 - description: Clock Manager Image (CMI) block.
[all …]
Dqcom,sc8280xp-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
17 const: qcom,sc8280xp-camss
22 clock-names:
24 - const: camnoc_axi
25 - const: cpas_ahb
26 - const: csiphy0
[all …]
Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
16 video DMA engines and video data processors.
22 Data interfaces on all video devices are described by their child 'port' nodes.
23 Configuration of a port depends on other devices participating in the data
[all …]
Dqcom,msm8996-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
11 - Todor Tomov <todor.too@gmail.com>
18 const: qcom,msm8996-camss
24 clock-names:
26 - const: top_ahb
27 - const: ispif_ahb
[all …]
Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
30 - ti,am654-cal
[all …]
Dqcom,sc7280-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7280-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Azam Sadiq Pasha Kapatrala Syed <akapatra@quicinc.com>
11 - Hariram Purushothaman <hariramp@quicinc.com>
18 const: qcom,sc7280-camss
23 reg-names:
25 - const: csid0
26 - const: csid1
[all …]
Dqcom,sdm845-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
17 const: qcom,sdm845-camss
23 clock-names:
25 - const: camnoc_axi
26 - const: cpas_ahb
27 - const: cphy_rx_src
[all …]
Dqcom,sdm660-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
11 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
18 const: qcom,sdm660-camss
24 clock-names:
26 - const: ahb
27 - const: cphy_csid0
[all …]
/linux-6.15/arch/arm64/boot/dts/renesas/
Dr8a779a0-falcon-csi-dsi.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
23 remote-endpoint = <&max96712_out0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
Dhihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 #include "aistarvision-mipi-adapter-2.1.dtsi"
18 clock-lanes = <0>;
19 data-lanes = <1 2>;
20 remote-endpoint = <&ov5645_ep>;
32 clock-lanes = <0>;
33 data-lanes = <1 2>;
34 remote-endpoint = <&imx219_ep>;
41 pinctrl-0 = <&i2c3_pins>;
42 pinctrl-names = "default";
[all …]
Dwhite-hawk-csi-dsi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
24 line-orders = <MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC
27 remote-endpoint = <&max96712_out0>;
[all …]
Dr8a774c0-ek874-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774c0-ek874.dts"
13 #include "aistarvision-mipi-adapter-2.1.dtsi"
16 …model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875) with aistarvision-mipi-v2-ada…
17 compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
38 clock-lanes = <0>;
39 data-lanes = <1 2>;
40 remote-endpoint = <&ov5645_ep>;
[all …]
/linux-6.15/Documentation/driver-api/media/drivers/
Dipu6.rst1 .. SPDX-License-Identifier: GPL-2.0
34 ------------------------
51 ---------
61 -------------------------------------
76 -----------------
80 Buttress with a copy of the SoC time, this counter maintains the up-to-date time
90 32-bit virtual address space. The IPU6 has MMU address translation hardware to
94 IPU6 driver. The IPU6 driver sets the level-1 page table base address to MMU
106 component includes 3 entries - manifest, metadata and module data. Manifest and
107 metadata are defined by CSE and used by CSE for authentication. Module data is
[all …]
/linux-6.15/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
15 video data for image processing.
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
18 packet data. The optional Video Format Bridge (VFB) converts this data to
[all …]
/linux-6.15/drivers/media/platform/ti/omap3isp/
Dispcsiphy.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CSI PHY module
30 regmap_read(phy->isp->syscon, phy->isp->syscon_offset, &reg); in csiphy_routing_cfg_3630()
54 /* Select data/clock or data/strobe mode for CCP2 */ in csiphy_routing_cfg_3630()
66 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, reg); in csiphy_routing_cfg_3630()
80 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, 0); in csiphy_routing_cfg_3430()
87 regmap_write(phy->isp->syscon, phy->isp->syscon_offset, csirxfe); in csiphy_routing_cfg_3430()
95 * @ccp2_strobe: false: data/clock, true: data/strobe
99 * and 3630, so they will not hold their contents in off-mode. This isn't an
106 if (phy->isp->phy_type == ISP_PHY_TYPE_3630 && on) in csiphy_routing_cfg()
[all …]
/linux-6.15/net/ethtool/
Dlinkmodes.c1 // SPDX-License-Identifier: GPL-2.0-only
32 struct linkmodes_reply_data *data = LINKMODES_REPDATA(reply_base); in linkmodes_prepare_data() local
33 struct net_device *dev = reply_base->dev; in linkmodes_prepare_data()
36 data->lsettings = &data->ksettings.base; in linkmodes_prepare_data()
42 ret = __ethtool_get_link_ksettings(dev, &data->ksettings); in linkmodes_prepare_data()
48 if (!dev->ethtool_ops->cap_link_lanes_supported) in linkmodes_prepare_data()
49 data->ksettings.lanes = 0; in linkmodes_prepare_data()
51 data->peer_empty = in linkmodes_prepare_data()
52 bitmap_empty(data->ksettings.link_modes.lp_advertising, in linkmodes_prepare_data()
63 const struct linkmodes_reply_data *data = LINKMODES_REPDATA(reply_base); in linkmodes_reply_size() local
[all …]
/linux-6.15/Documentation/devicetree/bindings/media/i2c/
Dadv748x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kieran Bingham <kieran.bingham@ideasonboard.com>
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
15 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB
21 - enum:
22 - adi,adv7481
23 - adi,adv7482
29 The ADV748x has up to twelve 256-byte maps that can be accessed via the
[all …]
/linux-6.15/arch/arm64/boot/dts/ti/
Dk3-j721e-sk-csi2-dual-imx219.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * on J721E SK, AM68 SK or AM69-SK board.
5 * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
7 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
17 clk_imx219_fixed: imx219-xclk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
/linux-6.15/drivers/phy/rockchip/
Dphy-rockchip-snps-pcie3.c1 // SPDX-License-Identifier: GPL-2.0
68 u32 lanes[4]; member
83 priv->mode = PHY_MODE_PCIE_RC; in rockchip_p3phy_set_mode()
86 priv->mode = PHY_MODE_PCIE_EP; in rockchip_p3phy_set_mode()
89 dev_err(&phy->dev, "%s, invalid mode\n", __func__); in rockchip_p3phy_set_mode()
90 return -EINVAL; in rockchip_p3phy_set_mode()
98 struct phy *phy = priv->phy; in rockchip_p3phy_rk3568_init()
104 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, GRF_PCIE30PHY_DA_OCM); in rockchip_p3phy_rk3568_init()
106 for (int i = 0; i < priv->num_lanes; i++) { in rockchip_p3phy_rk3568_init()
107 dev_info(&phy->dev, "lane number %d, val %d\n", i, priv->lanes[i]); in rockchip_p3phy_rk3568_init()
[all …]
/linux-6.15/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c1 // SPDX-License-Identifier: GPL-2.0
18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
24 return -EINVAL; in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
30 dev_err(&pdev->dev, "failed to read lane data\n"); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
[all …]
/linux-6.15/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c1 // SPDX-License-Identifier: GPL-2.0
18 prop = of_find_property(ep, "lanes", &len); in hdmi_parse_lanes_of()
20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
24 return -EINVAL; in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
30 dev_err(&pdev->dev, "failed to read lane data\n"); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
[all …]
/linux-6.15/drivers/net/ethernet/mellanox/mlx5/core/
Dport.c2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
43 int err = -ENOMEM; in mlx5_access_reg()
46 void *data; in mlx5_access_reg() local
53 data = MLX5_ADDR_OF(access_register_in, in, register_data); in mlx5_access_reg()
54 memcpy(data, data_in, size_in); in mlx5_access_reg()
67 data = MLX5_ADDR_OF(access_register_out, out, register_data); in mlx5_access_reg()
68 memcpy(data_out, data, size_out); in mlx5_access_reg()
315 return -EIO; in mlx5_query_module_id()
[all …]

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